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BLUENRG-1 Datasheet(PDF) 26 Page - STMicroelectronics |
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BLUENRG-1 Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 173 page  Functional details BlueNRG-1 26/173 DocID028866 Rev 1 Bit Field name Reset RW Description 6 WKP_IO12 0x0 R Wakeup from external IO12 7 WKP_IO13 0x0 R Wakeup from external IO13 8 WKP_BLUE 0x0 R Wakeup coms from the timer 1 expiration in the wakeup control block of the BLE radio 10 WKP2_BLUE 0x0 R Wakeup coms from the timer 2 expiration in the wakeup control block of the BLE radio 31:11 RESERVED 0x0 R RESERVED Table 18: CKGEN_BLE - CLK32K_COUNT register description: address offset CKGEN_BLE_BASE_ADDR+0x0C Bit Field name Reset RW Description 8:0 SLOW_COUNT 0xF RW Program the window length (in slow clock period unit) for slow clock measurement 31:9 RESERVED 0x0 R RESERVED Table 19: CKGEN_BLE - CLK32K_PERIOD register description: address offset CKGEN_BLE_BASE_ADDR+0x10 Bit Field name Reset RW Description 18:0 SLOW_PERIOD 0x0 R Indicates slow clock period information. The result provided in this field corresponds to the length of SLOW_COUNT periods of the slow clock (32 kHz) measured in 16 MHz half-period unit. The measurement is done automatically each time the device enters in active2 mode using SLOW_COUNT = 16. A new calculation can be launched by writing zero in CLK32K_PERIOD register. In this case, the time window uses the value programmed in SLOW_COUNT field. 31:19 RESERVED 0x0 R RESERVED Table 20: CKGEN_BLE - CLK32K_FREQ register description: address offset CKGEN_BLE_BASE_ADDR+0x14 Bit Field name Reset RW Description 26:0 SLOW_FREQ 0x0 R Value equal to 2^33 / SLOW_PERIOD 31:27 RESERVED 0x0 R RESERVED Table 21: CKGEN_BLE - CLK32K_IT register description: address offset CKGEN_BLE_BASE_ADDR+0x18 Bit Field name Reset RW Description 0 CLK32K_MEAS_IRQ 0x0 RW When read, provides the status of the interrupt indicating slow lock measurement is finished: 0: No pending interrupt. 1: Pending interrupt. When written, clears the interrupt: 0: No effect. 1: Clear the interrupt. |
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