BLUENRG-1 datasheet(37/173 Pages) STMICROELECTRONICS

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BlueNRG-1

Functional details

DocID028866 Rev 1

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3.7.2.4

Programmable data width, data alignment and endianness

When PSIZE and MSIZE are not equal, the DMA performs some data alignments as

described in Table 35: "Programmable data width and endian behavior (when bits PINC =

MINC = 1)": Programmable data width & endian behavior (when bits PINC = MINC = 1).

Table 35: Programmable data width and endian behavior (when bits PINC = MINC = 1)

Source

port

width

Destination

port width

Number of

data items

to transfer

(NDT)

Source

content:

address/data

Transfer operations

Destination

content:

address/data

@0x0 / B0

1: READ B0[7:0]

@0x0 then WRITE

B0[7:0] @0x0

@0x0 / B0

@0x1 / B1

2: READ B1[7:0]

@0x1 then WRITE

B0[7:0] @0x1

@0x1 / B1

@0x2 / B2

3: READ B2[7:0]

@0x2 then WRITE

B0[7:0] @0x2

@0x2 / B2

@0x3 / B3

4: READ B3[7:0]

@0x3 then WRITE

B0[7:0] @0x3

@0x3 / B3

@0x0 / B0

1: READ B0[7:0]

@0x0 then WRITE

00B0[15:0] @0x0

@0x0 / 00B0

@0x1 / B1

2: READ B1[7:0]

@0x1 then WRITE

00B0[15:0] @0x2

@0x2 / 00B1

@0x2 / B2

3: READ B2[7:0]

@0x2 then WRITE

00B0[15:0] @0x4

@0x4 / 00B2

@0x3 / B3

4: READ B3[7:0]

@0x3 then WRITE

00B0[15:0] @0x6

@0x6 / 00B3

@0x0 / B0

1: READ B0[7:0]

@0x0 then WRITE

000000B0[31:0] @0x0

@0x0 /

000000B0

@0x1 / B1

2: READ B1[7:0]

@0x1 then WRITE

000000B0[31:0] @0x4

@0x4 /

000000B1

@0x2 / B2

3: READ B2[7:0]

@0x2 then WRITE

000000B0[31:0] @0x8

@0x8 /

000000B2

@0x3 / B3

4: READ B3[7:0]

@0x3 then WRITE

000000B0[31:0]

@0xC

@0xC /

000000B3

@0x0 / B1B0

1: READ B1B0[15:0]

@0x0 then WRITE

B0[7:0] @0x0

@0x0 / B0

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