MC68HC908AP16CFB datasheet(281/440 Pages) MOTOROLA

281 / 440 page

Infrared Serial Communications Interface Module (IRSCI)

I/O Registers

MC68HC908AP Family — Rev. 2.5

Data Sheet

MOTOROLA

281

OR — Receiver Overrun Bit

This clearable, read-only bit is set when software fails to read the

IRSCDR before the receive shift register receives the next character.

The OR bit generates an SCI error CPU interrupt request if the ORIE

bit in IRSCC3 is also set. The data in the shift register is lost, but the

data already in the IRSCDR is not affected. Clear the OR bit by

reading IRSCS1 with OR set and then reading the IRSCDR. Reset

clears the OR bit.

1 = Receive shift register full and SCRF = 1

0 = No receiver overrun

Software latency may allow an overrun to occur between reads of

IRSCS1 and IRSCDR in the flag-clearing sequence. Figure 14-16

shows the normal flag-clearing sequence and an example of an

overrun caused by a delayed flag-clearing sequence. The delayed

read of IRSCDR does not clear the OR bit because OR was not set

when IRSCS1 was read. Byte 2 caused the overrun and is lost. The

next flag-clearing sequence reads byte 3 in the IRSCDR instead of

byte 2.

In applications that are subject to software latency or in which it is

important to know which byte is lost due to an overrun, the flag-

clearing routine can check the OR bit in a second read of IRSCS1

after reading the data register.

NF — Receiver Noise Flag Bit

This clearable, read-only bit is set when the SCI detects noise on the

RxD pin. NF generates an SCI error CPU interrupt request if the NEIE

bit in IRSCC3 is also set. Clear the NF bit by reading IRSCS1 and

then reading the IRSCDR. Reset clears the NF bit.

1 = Noise detected

0 = No noise detected

FE — Receiver Framing Error Bit

This clearable, read-only bit is set when a logic 0 is accepted as the

stop bit. FE generates an SCI error CPU interrupt request if the FEIE

bit in IRSCC3 also is set. Clear the FE bit by reading IRSCS1 with FE

set and then reading the IRSCDR. Reset clears the FE bit.

1 = Framing error detected

0 = No framing error detected

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 281 Page - Motorola, Inc

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