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JS48F4400P0P3C0 Datasheet(PDF) 138 Page - Numonyx B.V |
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JS48F4400P0P3C0 Datasheet(HTML) 138 Page - Numonyx B.V |
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138 / 139 page ![]() Numonyx™ StrataFlash® Cellular Memory (M18) Datasheet April 2008 138 309823-10 Table 69: NOR Flash Family Decoder Code Family Marketing Name C C3 Numonyx™ Advanced+ Boot Block Flash Memory J J3v.D Numonyx™ Embedded Flash Memory L L18 / L30 Numonyx™ StrataFlash® Wireless Memory M M18 Numonyx™ StrataFlash® Cellular Memory P P30 / P33 Numonyx™ StrataFalsh® Embedded Memory W W18 / W30 Numonyx™ Wireless Flash Memory 0(zero) - No Die Table 70: Voltage / NOR Flash CE# Configuration Decoder Code I/O Voltage (Volt) Core Voltage (Volt) CE# Configuration Z 3.0 1.8 Seperate Chip Enable per die Y 1.8 1.8 Seperate Chip Enable per die X 3.0 3.0 Seperate Chip Enable per die V 3.0 1.8 Virtual Chip Enable U 1.8 1.8 Virtual Chip Enable T 3.0 1.8 Virtual Chip Enable R3.0 1.8 Virtual Address Q1.8 1.8 Virtual Address P3.0 3.0 Virtual Address Table 71: Parameter / Mux Configuration Decoder (Sheet 1 of 2) Code, Mux Identification Number of Flash Die Bus Width Flash Die 1 Flash Die 2 Flash Die 3 Flash Die 4 0 = Non Mux 1 = AD Mux 3 = "Full" AD Mux Any NA Notation used for stacks that contain no parameter blocks B = Non Mux C = AD Mux F = "Full" Ad Mux 1 X16 Bottom - - - 2 Bottom Top - - 3 Bottom Bottom Top - 4 Bottom Top Bottom Top 2 X32 Bottom Bottom - - 4 Bottom Bottom Top Top |
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