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LSM6DSO16IS Datasheet(PDF) 45 Page - STMicroelectronics |
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LSM6DSO16IS Datasheet(HTML) 45 Page - STMicroelectronics |
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45 / 107 page ![]() 9.25 STATUS_MASTER_MAINPAGE (39h) Sensor hub status register (R) Table 81. STATUS_MASTER_MAINPAGE register WR_ONCE_ DONE SLAVE3_ NACK SLAVE2_ NACK SLAVE1_ NACK SLAVE0_ NACK 0 0 SENS_HUB_ ENDOP Table 82. STATUS_MASTER_MAINPAGE register description WR_ONCE_DONE When the bit WRITE_ONCE in MASTER_CONFIG (14h) is configured as 1, this bit is set to 1 when the write operation on slave 0 has been performed and completed. Default value: 0 SLAVE3_NACK This bit is set to 1 if Not acknowledge occurs on slave 3 communication. Default value: 0 SLAVE2_NACK This bit is set to 1 if Not acknowledge occurs on slave 2 communication. Default value: 0 SLAVE1_NACK This bit is set to 1 if Not acknowledge occurs on slave 1 communication. Default value: 0 SLAVE0_NACK This bit is set to 1 if Not acknowledge occurs on slave 0 communication. Default value: 0 SENS_HUB_ENDOP Sensor hub communication status. Default value: 0 (0: sensor hub communication not concluded; 1: sensor hub communication concluded) 9.26 TIMESTAMP0 (40h), TIMESTAMP1 (41h), TIMESTAMP2 (42h), and TIMESTAMP3 (43h) Timestamp first data output register (R). The value is expressed as a 32-bit word and the bit resolution is 25 µs. These registers are also accessible from ISPU at address 6940h, 6941h, 6942h, 6943h (R). Table 83. TIMESTAMP0 output register D7 D6 D5 D4 D3 D2 D1 D0 Table 84. TIMESTAMP1 output register D15 D14 D13 D12 D11 D10 D9 D8 Table 85. TIMESTAMP2 output register D23 D22 D21 D20 D19 D18 D17 D16 Table 86. TIMESTAMP3 output register D31 D30 D29 D28 D27 D26 D25 D24 Table 87. TIMESTAMP output register description D[31:0] Timestamp output registers: 1LSB = 25 µs. LSM6DSO16IS STATUS_MASTER_MAINPAGE (39h) DS13892 - Rev 2 page 45/107 |
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