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LSM6DSO16IS Datasheet(PDF) 52 Page - STMicroelectronics |
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LSM6DSO16IS Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 107 page  11 ISPU interaction register description 11.1 ISPU_CONFIG (02h) ISPU configuration register (R/W). This register is also accessible from ISPU at address 6802h (R). Table 108. ISPU_CONFIG register 0(1) 0(1) 0(1) LATCHED 0(1) 0(1) CLK_DIS ISPU_ RST_N 1. This bit must be set to 0 for the correct operation of the device. Table 109. ISPU_CONFIG register description LATCHED Configures the interrupt generation. (0: interrupt pulsed; 1: interrupt latched) CLK_DIS When active, stops the clock of ISPU. ISPU_RST_N ISPU active-low reset. 11.2 ISPU_STATUS (04h) ISPU status register (R). This register is also accessible from ISPU at address 6804h (R/W). Table 110. ISPU_STATUS register 0(1) 0(1) 0(1) 0(1) 0(1) BOOT_END 0(1) 0(1) 1. This bit must be set to 0 for the correct operation of the device. Table 111. ISPU_STATUS register description BOOT_END End of ISPU boot procedure. LSM6DSO16IS ISPU interaction register description DS13892 - Rev 2 page 52/107 |
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