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S32K311NHT0MPAST Datasheet(PDF) 107 Page - NXP Semiconductors

Part # S32K311NHT0MPAST
Description  Automotive General Purpose MCUs
PDF  143 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

S32K311NHT0MPAST Datasheet(HTML) 107 Page - NXP Semiconductors

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3. Output timing valid for maximum external load CL = 13.5 pF (includes PCB trace, package trace (around 2pF) and flash
input load).
RXC (at transmitter)
RXC (at receiver)
RX_CTL
RXD[8:5][3:0]
RXD[7:4][3:0]
RXD[8:5]
RXD[7:4]
RXD[3:0]
RXD[4]
RXDV
RXD[9]
RXERR
TskewT
TskewR
Figure 55. RGMII Receive Timing
TXC (at transmitter)
TXC (at receiver)
TX_CTL
TXD[8:5][3:0]
TXD[7:4][3:0]
TXD[8:5]
TXD[7:4]
TXD[3:0]
TXD[4]
TXEN
TXD[9]
TXERR
TskewT
TskewR
Figure 56. RGMII Transmit Timing
12.8.5 MDIO timing specifications
The following table describes the MDIO electrical characteristics. Measurements are with maximum output load of 25 pF, input
transition of 1 ns and pad configured with fastest slew settings (DSE = 1'b1 and SRE = 1’b0). I/O operating voltage ranges from
2.97 V to 3.63 V. MDIO pin must have external Pull-up. Valid pin combinations to be referred from K3xx*_Use sheet in IOmux.
Table 56. MDIO timing specifications
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
—
MDC clock
frequency
—
—
2.5
MHz
—
—
MDC1
MDC pulse width
high
40
—
60
%MDC
period
—
MDC1
MDC2
MDC pulse width low 40
—
60
%MDC
period
—
MDC2
MDC5
MDC falling edge
to MDIO output
valid(maximum
propagation delay)
—
—
25
ns
—
MDC5
MDC6
MDC falling edge
to MDIO output
-10
—
—
ns
—
MDC6
Table continues on the next page...
NXP Semiconductors
Communication interfaces
S32K3xx Data Sheet, Rev. 9.1, 03/2024
Data Sheet: Technical Data
Preliminary Information for S32K388
107 / 143



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