S32K311NHT0MPAST datasheet(127/143 Pages) NXP

127 / 143 page

Rev 9, January 2024

— Added information "Data transitions measured at 25%/62.5% at 3.3V for the write path. Data transitions measured at

mid-supply for the read path. Clock transitions measured at mid-supply."

— Removed footnote "Input timing assumes an input signal slew rate of 3ns (20%/80%)" from "uSDHC SDR electrical

specifications" and "uSDHC DDR electrical specifications" table. Added input transition of 1ns (20%/80%) information

to top of the table.

• In section "uSDHC DDR electrical specifications", removed spec "fpp" with description "Clock frequency (SD3.0 DDR)".

• In uSDHC SDR and uSDHC DDR electrical specifications updated footnote to "Output timing valid for maximum external

load CL = 25 pF..."

Rev 8.1, November 2023

• Updated "supply currents" for "S32K344, S32K324, S32K314, S32K342, S32K322, S32K341 and S32K312".

Rev 8, Jun 2023

• Moved S32K311 and S32K310 to support list from preliminary and added S32K322 to supported list.

• Updated frequency to 320 MHz for S32K388 mentioned in features and updated S32K388 block diagram.

• In section "Thermal operating characteristics" added ambient temperature seperately for both V- and M-grade parts.

• Deleted power management figures. See reference manual for these figures.

• Decoupling capacitors are updated with new formats.

• In section "V15 regulator (SMPS option) electrical specifications" updated the SMPS circuit figure.

• In section "V11 regulator (NMOS ballast transistor control) electrical specifications" updated V11 output from 1.14 to

1.155 V.

• In section "Supply currents" added current numbers for S32K311 and S32K310 and added support for 320MHz for

S32K388.

• In section "Supply currents" merged VDD_HV_A for S32K3x8, S32K34x, S32K32x and S32K314 and mentioned the

max current.

• Added table title to table in section "Cyclic wake-up current".

• In section "Low Power Comparator (LPCMP)",

— for symbol tDDAC updated description from "DAC Initialization and switching settling time" to "DAC Initialization

time".

— updated footnote attached to TDHSS and TDLSS from "Applied +/- (30 mV + 2 x VAHYST0/1/2/3 + max. of VAIO)

around switch point" to "Applied +/- (30 mV + VAHYST0/1/2/3 + max. of VAIO) around switch point"

• In section "Temperature Sensor" clarified that its an MCU on-die temperature sensor.

• In section "FIRC" updated FACC for S32K311 and S32K310 for different temperature ranges.

• In section "PLL", added sentence "Jitter values specified in this table are applicable for FXOSC reference clock input

only".

• In section "Fast External Oscillator (FXOSC)", added IFXOSC for ALC disabled.

• In section "Slow Crystal Oscillator (SXOSC)" updated ISXOSC max from 4 to 10 uA.

NXP Semiconductors

Revision history

S32K3xx Data Sheet, Rev. 9.1, 03/2024

Data Sheet: Technical Data

Preliminary Information for S32K388

127 / 143

S32K311NHT0MPAST Datasheet(PDF) 127 Page - NXP Semiconductors

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