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S32K311NHT0MPAST Datasheet(PDF) 125 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 125 Page - NXP Semiconductors |
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125 / 143 page ![]() Rev 9, January 2024 — Updated footnote "When input pad voltage levels are close to VDD_HVA_A..." — Added new footnotes "Keeping the input voltage between" and "If a positive injection current is present..." — Added "S32K388" in statement "The VDD_DCDC supply voltage is only present in certain devices.." — Updated condition for V15 and V11 spec. • In "Power mode transition operating behaviour", added values for S32K3x8 devices. • In "Supply Monitoring", added footnote "The HVD_V15 monitor is provided to indicate if the V15 rail is far above the standard V15 operating range...". • In Recommneded Decoupling capacitors diagrams and SMPS Circuit updated "VDD_HV_SMPS" to "VDD_DCDC". • In Table. "V15 regulator (SMPS option) electrical specifications" added symbol "L_SMPS" for External coil inductance and "D_SMPS" for External Schottky diode average forward current. • Added IBCTL label in "Ballast circuit" figure. • In "V11 regulator (NMOS ballast transistor control) electrical specifications" added new spec "VTH_NMOS" for 5.0 V supply and updated Max value to "1.5" for VTH spec for 3.3 V supply. • In "Supply currents" section , added values for "S32K358, S32K348, S32K338, S32K328". • In RUN mode supply currents (peripherals disabled) for S32K3x8, deleted values from " Min. Config. [Clock Option A+] Triple Core @240 MHz " for S32K358, S32K348, S32K338, S32K328 variants. • In GPIO DC electrical specifications:- — Updated footnote "I/O timing specifications are valid for the un-terminated 50ohm..." and figure related to it with correct load details. — Updated the conditions for FMAX specs. • In "GPIO DC electrical specifications, 3.3V Range (2.97V - 3.63V)", added spec "FMAX_33_F" with max frequency 125 MHz. • In GPIO Output AC electrical specifications, updated spec values and added new footnotes and figure. • In "GPIO DC electrical specifications, 3.3V Range (2.97V - 3.63V)" and "GPIO DC electrical specifications, 5.0V (4.5V - 5.5V)", updated the max and min values of ILKG parameters. • Updated table "FIRC" mentioning FACC +/-5% for all K3xx devices. • Updating figure title to "S32K310: ASIL B Single Core 512 KB General Purpose MCU". • In "FXOSC": — Added note "To improve the FXOSC & PLL jitter performance..." — Updated the footnote "To improve the FXOSC jitter & duty cycle performance.." • In "PLL", updated min value for "FPLL_out" from 48 to 25 MHz. • In LPSPI, updated the output loads. • In "LPSPI2 and LPSPI5 20MHz combination for S32K388", added new table "LPSPI2 and LPSPI0 20MHz combination for S32K388". • In "LPSPI" — Updating min values of tLEAD/tLAG to ""tSPCK/2" for LPSPI Slave mode. Table continues on the next page... NXP Semiconductors Revision history S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 125 / 143 |
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