S32K311NHT0MPAST datasheet(117/143 Pages) NXP

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SDx_CLK

Output from eSDHCv3 to card

SDx_DATA[7:0]

Input from card to eSDHCv3

SDx_DATA[7:0]

SD2

SD3

SD4

SD2

.......

SD1

Figure 61. SD/eMMC4.4/4.41 DDR50 Mode Interface Timing

12.11 LPUART specifications

See I/O parameters for LPUART specifications.

13 Debug modules

13.1 Debug trace timing specifications

The following table describes the Debug trace electrical characteristics. Measurements are with maximum output load of 25pF,

input transition of 1ns and pad configured with DSE = 1'b1 and SRE = 1'b0.

Table 64. Debug trace timing specifications

Symbol

Description

Min

Typ

Max

Unit

Condition

Spec

Number

fTRACE

Trace clock

frequency (trace on

Fast pads)

—

120

MHz

Applies to all

K3xx variants except

S32K388

—

fTRACE

Trace clock

frequency (trace on

Fast pads)

—

125

MHz

Applies to S32K388

—

fTRACE

Trace clock

frequency (trace on

StandardPlus pads)

—

MHz

—

tDVW

Data output valid

window

1.2

—

tDIV

Data output invalid

0.3

—

NXP Semiconductors

Debug modules

S32K3xx Data Sheet, Rev. 9.1, 03/2024

Data Sheet: Technical Data

Preliminary Information for S32K388

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S32K311NHT0MPAST Datasheet(PDF) 117 Page - NXP Semiconductors

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