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S32K311NHT0MPAST Datasheet(PDF) 118 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 118 Page - NXP Semiconductors |
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118 / 143 page ![]() Figure 62. Trace CLKOUT specifications 13.2 SWD electrical specifications The following table describes the SWD electrical characteristics. Measurements are with maximum output load of 30pF, input transition of 1ns and pad configured with DSE = 1'b1 and SRE = 1'b0. Table 65. SWD electrical specifications Symbol Description Min Typ Max Unit Condition Spec Number S1 SWD_CLK frequency — — 33 MHz — S1 S2 SWD_CLK cycle period 1 / S1 — — ns — S2 S3 SWD_CLK pulse width 40 — 60 % — S3 S4 SWD_CLK rise and fall times — — 1 ns — S4 S9 SWD_DIO input data setup time to SWD_CLK rise 5 — — ns — S9 S10 SWD_DIO input data hold time after SWD_CLK rising edge 5 — — ns — S10 S11 SWD_CLK high to SWD_DIO output data valid — — 22 ns — S11 S12 SWD_CLK high to SWD_DIO output data hi-Z — — 22 ns — S12 S13 SWD_CLK high to SWD_DIO output data invalid 0 — — ns — S13 NXP Semiconductors Debug modules S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 118 / 143 |
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