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S32K311NHT0MPAST Datasheet(PDF) 115 Page - NXP Semiconductors |
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S32K311NHT0MPAST Datasheet(HTML) 115 Page - NXP Semiconductors |
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115 / 143 page  Table 62. uSDHC SDR electrical specifications (continued) Symbol Description Min Typ Max Unit Condition Spec Number tTHL Clock fall time 1,4 — — 4 ns Medium/Fast pad SD5 tTHL Clock fall time 1,4 — — 8 ns Standard plus/Medium pad SD5 tOD SDHC output delay (output valid) 1 -5.6 — 2.6 ns fpp= 50 MHz, SDHC_ CLK to SDHC_DAT SD6 tOD SDHC output delay (output valid) 1 -5.6 — 10.64 ns fpp= 25 MHz, 400 KHz, SDHC_CLK to SDHC_ CMD / SDHC_DAT SD6 tOD SDHC output delay (output valid) 1 -5.6 — 3.1 ns fpp= 50 MHz, SDHC_ CLK to SDHC_CMD SD6 tISU SDHC Input setup time 6.3 — — ns fpp= 25 MHz, 400 KHz, SDHC_CMD / SDHC_ DAT to SDHC_CLK — tISU SDHC Input setup time 4.8 — — ns fpp= 50 MHz, SDHC_ CMD / SDHC_DAT to SDHC_CLK SD7 tIH SDHC Input hold time 2 — — ns SDHC_CLK to SDHC_ CMD / SDHC_DAT SD8 1. Output timing valid for maximum external load CL = 25pF, which is assumed to be a 10pF load at the end of a 50Ohm, un-terminated, 3.5 inch microstrip trace on standard FR4 (1.5pF/inch), (25pF total with margin). 2. In normal (full) speed mode for SD/SDIO card, clock frequency can be any value between 0–25 MHz. In high-speed mode, clock frequency can be any value between 0–50 MHz. 3. In normal (full) speed mode for MMC card, clock frequency can be any value between 0–25 MHz. In high-speed mode, clock frequency can be any value between 0–50 MHz. 4. The SDHC_CLK rise/fall time specification applies to the input clock transition required in order to meet the output delay specifications. SDHC_CLK output transition time is dependent on output load and GPIO pad drive strength. See the GPIO pad specifications for detail. SD4 SD5 SDx_CLK Output from uSDHC to card SDx_DATA[7:0] Input from card to uSDHC SDx_DATA[7:0] SD3 SD2 SD6 SD7 SD8 SD1 Figure 60. SD/eMMC4.3 High Speed Mode Interface Timing NXP Semiconductors Communication interfaces S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 115 / 143 |
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