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JS48F4400P0P3C0 Datasheet(PDF) 108 Page - Numonyx B.V

Part # JS48F4400P0P3C0
Description  StrataFlash짰 Cellular Memory
PDF  139 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

JS48F4400P0P3C0 Datasheet(HTML) 108 Page - Numonyx B.V

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Numonyx™ StrataFlash® Cellular Memory (M18)
Datasheet
April 2008
108
309823-10
Figure 59: Protection Register Programming Flowchart
FULL STATUS CHECK PROCEDURE
Program Protection Register operation addresses must be
within the Protection Register address space. Addresses
outside this space will return an error.
Repeat for subsequent programming operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set Read Array state
.
SR[3] must be cleared before the Write State Machine will
allow further program attempts.
Only the Clear Staus Register command clears SR[1 , 3, 4].
If an error is detected, clear the Status register before
attempting a program retry or other error recovery.
1
0
1
PROTECTION REGISTER PROGRAMMING PROCEDURE
Start
Write 0xC0,
PR Address
Write PR
Address & Data
Read Status
Register
SR[7] =
Full Status
Check
(if desired)
Program
Complete
Read Status
Register Data
Protection Register
Program Fail
SR[3] =
VPP Range Error
Bus
Operation
Command
Comments
Write
Write
Idle
Program
PR Setup
Protection
Program
None
Data = 0xC0
Addr = First Location to Program
Data = Data to Program
Addr = Location to Program
Check SR[7]:
1 = WSM Ready
0 = WSM Busy
Bus
Operation
Command
Comments
Read
None
Status Register Data.
(Program Setup )
(Confirm Data)
0
0
SR[4] =
1
1
SR[1] =
Register Locked;
Program Aborted
0
Idle
None
Check SR[1]:
1 = Block locked; operation aborted
Idle
None
Check SR[4]:
1 =Programming Error
Idle
None
Check SR[3]:
1 =VPP Range Error
.
Protection Register
Program Pass



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