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JS48F4400P0P3C0 Datasheet(PDF) 109 Page - Numonyx B.V |
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JS48F4400P0P3C0 Datasheet(HTML) 109 Page - Numonyx B.V |
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109 / 139 page ![]() April 2008 Datasheet 309823-10 109 Numonyx™ StrataFlash® Cellular Memory (M18) Figure 60: Blank Check Operation Flowchart Start FULL BLANK CHECK STATUS CHECK PROCEDURE No 1 0 Write 0xBC, Block Address Write 0xD0, Block Address Read Status Register SR[7] = Full Blank Check Status Read Blank Check BLANK CHECK PROCEDURE Bus Operation Command Comments Write Blank Check Setup Data = 0xBC Addr = Block to be read (BA) Write Blank Check Confirm Data = 0xD0 Addr = Block to be read (BA) Read None Status Register data. Idle None Check SR[7]: 1 = WSM ready 0 = WSM busy 0 SR[1,3] must be cleared before the Write State Machine will allow Blank Check to be performed. Only the Clear Status Register command clears SR[1, 3, 4, 5]. If an error is detected, clear the Status register before attempting a Blank Check retry or other error recovery. 0 0 1,1 1 Read Status Register Blank Check Successful Bus Operation Command Comments SR[4,5] = Command Sequence Error SR[5] = Blank Check Error Idle None Check SR[4,5]: Both 1 = Command Sequence Error Idle None Check SR[5]: 1 = Blank Check Error Repeat for subsequent block Blank Check. Full Status register check should be read after Blank Check has been performed on each block. |
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