JS48F4400P0P3C0 datasheet(113/139 Pages) NUMONYX

113 / 139 page

April 2008

Datasheet

309823-10

113

Numonyx™ StrataFlash® Cellular Memory (M18)

12.4

Device Geometry Definition

24h

“n” such that maximum buffer

write timeout = 2n times typical.

--02 (256, 512 Mbit - 90 nm;

128, 256, 512 Mbit - 65 nm)

--01 (1024 Mbit - 65 nm)

8192 µs (256, 512 Mbit -

90 nm; 128, 256, 512

Mbit - 65 nm)

4096 µs (1024 Mbit - 65

nm)

25h

“n” such that maximum block

erase timeout = 2n times typical.

--02

4 s

26h

“n” such that maximum chip

erase timeout = 2n times typical.

--00

Table 53: System Interface Information (Sheet 2 of 2)

Offset

Length

Description

Address

Hex Code

Value

Table 54: Device Geometry Definition

Offset

Length

Description

Address

Hex Code

Value

27h

n such that device size in bytes = 2n.27:

Flash device interface code assignment: n such that n + 1 specifies

the bit field that represents the flash device width capabilities as

described here:

Table 55, “Device

Geometry Definition: Addr,

Hex Code, Value” on

page 114

76543210

28h

————

x64

x32

x16

28:

--01

x16

————————

29:

--00

2Ah

n such that maximum number of bytes in write buffer = 2n.

2A:

2B:

--0A

--00

1024

2Ch

Number of erase block regions (x) within the device:

1) x = 0 means no erase blocking; the device erases in bulk.

2) x specifies the number of device regions with one or more

contiguous, same-size erase blocks.

3) Symmetrically blocked partitions have one blocking region.

2C:

Table 55, “Device

Geometry

Definition: Addr,

Hex Code, Value”

on page 114

2Dh

Erase block region 1 information:

bits 0 - 15 = y, y + 1 = number of identical-size erase blocks.

bits 16 - 31 = z, region erase block(s) size are z x 256 bytes.

2D:

2E:

2F:

30:

31h

Reserved for future erase block region information.

31:

32:

33:

34:

35h

Reserved for future erase block region information.

35:

36:

37:

38:

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