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AT91SAM7A2-AI Datasheet(PDF) 83 Page - ATMEL Corporation |
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AT91SAM7A2-AI Datasheet(HTML) 83 Page - ATMEL Corporation |
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83 / 369 page  83 PRELIMINARY AT91SAM7A2 6021A–ATARM–07/04 Peripheral Data Controller (PDC) Overview The Peripheral Data Controller (PDC) permits easy and quick transfers of large blocks of words from memory to peripheral or from peripheral to memory. Block Diagram Figure 42. PDC Block Diagram Each PDC channel, with a start address and a counter (number of words), can automat- ically put/get a block of transmitted words in/from a specific memory area. Each peripheral that transfers data can have a channel corresponding to a Peripheral Data Controller channel. The peripherals associated to the PDC channels are listed in Table 35, “PDC Connec- tion,” on page 86. PDC ADC1 PDC ADC0 PDC CAPT1 PDC CAPT0 PDC SPI PDC USART2 PDC USART1 PDC USART0 Arbiter ARM7TDMI CORE RAM EBI AMBA Bridge ASB APB PDC CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 |
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