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PSD4235G2-12UT Datasheet(PDF) 26 Page - STMicroelectronics

Part # PSD4235G2-12UT
Description  Flash in-system programmable (ISP) peripherals for 16-bit MCUs (3.3 V supply)
PDF  124 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD4235G2-12UT Datasheet(HTML) 26 Page - STMicroelectronics

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Register bit definition
PSD4235G2V
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5.9
Output macrocells A/B registers
Write register: Load MCellA7-MCellA0/MCellB7-MCellB0 with 0 or 1.
Read register: Read MCellA7-MCellA0/MCellB7-MCellB0 output status.
5.10
Mask macrocells A/B registers
McellA<i>_Prot:
0: Allow MCellA<i>/MCellB<i> flip-flop to be loaded by MCU (default).
1: Prevent MCellA<i>/MCellB<i> flip-flop from being loaded by MCU.
5.11
Flash Memory Protection register
Read-only register
Sec<i>_Prot:
1: Primary Flash memory Sector <i> is write protected.
0: Primary Flash memory Sector <i> is not write protected.
Table 14.
Output macrocells A register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mcella 7
Mcella 6
Mcella 5
Mcella 4
Mcella 3
Mcella 2
Mcella 1
Mcella 0
Table 15.
Output macrocells B register
Bit 7Bit 6
Bit 5Bit 4Bit 3
Bit 2Bit 1Bit 0
Mcellb 7
Mcellb 6
Mcellb 5
Mcellb 4
Mcellb 3
Mcellb 2
Mcellb 1
Mcellb 0
Table 16.
Mask macrocells A register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mcella 7
Mcella 6
Mcella 5
Mcella 4
Mcella 3
Mcella 2
Mcella 1
Mcella 0
Table 17.
Mask macrocells B register
Bit 7Bit 6
Bit 5Bit 4Bit 3
Bit 2Bit 1Bit 0
Mcellb 7
Mcellb 6
Mcellb 5
Mcellb 4
Mcellb 3
Mcellb 2
Mcellb 1
Mcellb 0
Table 18.
Flash Memory Protection register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot
Sec0_Prot



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