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PSD4235G2-12UT Datasheet(PDF) 33 Page - STMicroelectronics

Part # PSD4235G2-12UT
Description  Flash in-system programmable (ISP) peripherals for 16-bit MCUs (3.3 V supply)
PDF  124 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD4235G2-12UT Datasheet(HTML) 33 Page - STMicroelectronics

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Table 28.
Instructions(1)(2)(3)
Instruction(4)
FS0-FS7 or
CSBOOT0-
CSBOOT3(5)
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
Cycle 6
Cycle 7
READ(6)
1
“Read”
RD @ RA
Read Main Flash ID(7)
1
AAh@
XAAAh
55h@
X554h
90h@
XAAAh
Read ID
@ XX02h
Read Sector
Protection(7)(8)
(9)
1
AAh@
XAAAh
55h@
X554h
90h@
XAAAh
Read 00h
or 01h @
XX04h
Program a Flash
Word(9)
1
AAh@
XAAAh
55h@
X554h
A0h@
XAAAh
PD@ PA
Flash Sector
Erase(10)(9)
1
AAh@
XAAAh
55h@
X554h
80h@
XAAAh
AAh@
XAAAh
55h@
X554h
30h@
SA
30h(10)
@ next
SA
Flash Bulk Erase(9)
1
AAh@
XAAAh
55h@
X554h
80h@
XAAAh
AAh@
XAAAh
55h@
X554h
10h@
XAAAh
Suspend Sector
Erase(11)
1
B0h@
XXXXh
Resume Sector
Erase(12)
1
30h@
XXXXh
Reset(7)
1
F0h@
XXXXh
Unlock Bypass
1
AAh@
XAAAh
55h@
X554h
20h@
XAAAh
Unlock Bypass
Program(13)
1
A0h@
XXXXh
PD@ PA
Unlock Bypass
Reset(14)
1
90h@
XXXXh
00h@
XXXXh
1.
All bus cycles are WRITE bus cycles, except the ones with the “Read” label
2.
All values are in hexadecimal:
X = Don’t Care. Addresses of the form XXXXh, in this table, must be even addresses, RA = Address of the memory
location to be read
RD = Data read from location RA during the READ cycle
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of Write Strobe (WR,
CNTL0). PA is an even address for PSD in word programming mode.
PD = Data word to be programmed at location PA. Data is latched on the rising edge of Write Strobe (WR, CNTL0)
SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3) of the sector to
be erased, or verified, must be Active (High).
3.
Only address bits A11-A0 are used in instruction decoding.
4.
All WRITE bus cycles in an instruction are byte WRITE to an even address (XA4Ah or X554h). A Flash memory Program
bus cycle writes a word to an even address.
5.
Sector Select (FS0 to FS7 or CSBOOT0 to CSBOOT3) signals are active high, and are defined in PSDsoft Express.
6.
No Unlock or instruction cycles are required when the device is in the READ mode.
7.
The Reset instruction is required to return to the READ mode after reading the Flash ID, or after reading the Sector
Protection Status, or if the Error Flag bit (DQ5/DQ13) goes high.
8.
The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active,
and (A1,A0)=(1,0)



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