MPF7100BVBA2ES datasheet(44/125 Pages) NXP

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NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

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Product data sheet

Rev. 4 — 9 March 2021

44 / 125

TRESET[1:0]

Time to reset

16 s

The default value of the TRESET delay is programmable through the OTP_TRESET[1:0]

bits.

14.9.2 STANDBY

STANDBY is an input signal to the IC, when this pin is asserted, the device enters the

standby mode and when de-asserted, the part exits standby mode.

STANDBY can be configured as active high or active low using the STANDBYINV bit.

Table 31. Standby pin polarity control

STANDBY (pin)

STANDBYINV (I2C bit)

STANDBY control

Not in standby mode

In standby mode

Not in standby mode

14.9.3 RESETBMCU

RESETBMCU is an open-drain, active low output used to bring the processor (and

peripherals) in and out of reset.

The time slot RESETBMCU is de-asserted during the power up sequence is programmed

by the OTP_RESETBMCU_SEQ[7:0] bits, and it is a condition to enter the system-on

states.

During the system-on states, the RESETBMCU is de-asserted (pulled high), and it is

asserted (pulled low) as indicated in the power down sequence, when a system power

down or reset is initiated.

In the application, RESETBMCU can be pulled up to VDDIO or VSNVSx by a 100 kΩ

external resistor.

14.9.4 INTB

INTB is an open-drain, active low output. This pin is asserted (pulled low) when any

interrupt occurs, if the interrupt is not masked.

INTB is de-asserted after the corresponding interrupt latch is cleared by software, which

requires writing a “1” to the interrupt bit.

An INTB_TEST bit is provided to allow a manual test of the INTB pin. When INTB_TEST

is set to 1, the interrupt pin asserts for 100 µs and then de-asserts to its normal state.

The INTB_TEST bit self-clears to 0 automatically after the test pulse is generated.

In the application, INTB can be pulled up to VDDIO with an external 100 kΩ resistor.

14.9.5 XINTB

XINTB is an input pin used to receive an external interrupt and trigger an interrupt event

on the PF7100. It is meant to interact with the INTB pin of a companion PMIC, in order to

simplify MCU interaction to identify the source of the interrupt.

MPF7100BVBA2ES Datasheet(PDF) 44 Page - NXP Semiconductors

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