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MPF7100BVBA2ES Datasheet(PDF) 45 Page - NXP Semiconductors

Part # MPF7100BVBA2ES
Description  7-channel power management integrated circuit for high performance applications
PDF  125 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPF7100BVBA2ES Datasheet(HTML) 45 Page - NXP Semiconductors

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NXP Semiconductors
PF7100
7-channel power management integrated circuit for high performance applications
PF7100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 9 March 2021
45 / 125
A high to low transition on the XINTB pin sets the XINTB_I interrupt bit and causes the
INTB to be asserted, provided the interrupt is not masked.
The XINTB_S bit follows the actual status of the XINTB pin even when the XINTB_I has
been cleared or the interrupt has been masked.
This pin is internally pulled up to VDDIO with a 1.0 MΩ resistor; therefore, it can be left
unconnected when the XINTB is not used.
14.9.6 WDI
WDI is an input pin to the PF7100 and is intended to operate as an external watchdog
monitor.
When the WDI pin is connected to the watchdog output of the processor, this pin is used
to detect a pulse to indicate that a watchdog event is requested by the processor. When
the WDI pin is asserted, the device starts a watchdog event to place the PMIC outputs in
a default known state.
The WDI pin is monitored during the system-on states. In the OFF modes and during the
power up sequence, the WDI pin is masked until RESETBMCU is de-asserted.
The WDI can be configured to assert on the rising or the falling edge using the
OTP_WDI_INV bit.
• When OTP_WDI_INV = 0, the device starts a WD event on the falling edge of the WDI.
• When OTP_WDI_INV = 1, the device starts a WD event on the rising edge of the WDI.
A 10 µs debounce filter is implemented on either rising or falling edge detection to
prevent false WDI signals to start a watchdog event.
The OTP_WDI_MODE bit allows the WDI pin to react in two different ways:
• When OTP_WDI_MODE = 1, a WDI asserted performs a hard WD reset.
• When OTP_WDI_MODE = 0, a WDI asserted performs a soft WD reset.
The WDI_STBY_ACTIVE bit allows the WDI pin to generate a watchdog event during the
standby state.
• When WDI_STBY_ACTIVE = 0, asserting the WDI does not generate a watchdog
event during the standby state.
• When WDI_STBY_ACTIVE = 1, asserting the WDI starts a watchdog event during the
standby state.
The OTP_WDI_STBY_ACTIVE is used to configure whether the WDI is active in the
standby state or not by default upon power up.
See Section 15.10 "Watchdog event management" for details on watchdog event.
14.9.7 EWARN
EWARN is an active high output, used to notify that an imminent power failure is about to
occur. It should be pulled down to GND by a 100 kΩ resistor.
When a power down is initiated due to a fault, the EWARN pin is asserted before the
device starts powering down as defined by the EWARN_TIME[1:0] bits in order to allow
the system to prepare for the imminent shutdown.
The following faults cause the EWARN pin to be asserted:
• Fault timer expired



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