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MPF7100BVBA2ES Datasheet(PDF) 1 Page - NXP Semiconductors |
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MPF7100BVBA2ES Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 125 page ![]() PF7100 7-channel power management integrated circuit for high performance applications Rev. 4 — 9 March 2021 Product data sheet 1 Overview The PF7100 is a power management integrated circuit (PMIC) designed for high performance i.MX 8 processors. It features five high efficiency buck converters and two linear regulators for powering the processor, memory, and miscellaneous peripherals. Built-in one-time programmable memory stores key startup configurations, drastically reducing external components typically used to set output voltage and sequence of external regulators. Regulator parameters are adjustable through high-speed I2C after startup offering flexibility for different system states. 2 Features • Five high efficiency buck converters • Two linear regulators with load switch options • Watchdog timer/monitor • Monitoring circuit to fit ASIL B safety level • One-time programmable device configuration • 3.4 MHz I2C communication interface • 48-pin 7×7 mm QFN package 3 Simplified application diagram aaa-034294 VIN: 2.7 V to 5.5 V PF7100 i.MX8xXL VSNVS1 (3.0 V @ 10 mA) VDD_SNVS_3P0 VDD_MAIN BUCK1 (1.0 V @ 2.5 A) BUCK2 (1.0 V/1.1 V @ 2.5 A) VDD_DDR_VDDQ BUCK4 (1.1 V/1.35 V @ 2.5 A) VDD_1P8 BUCK5 (1.8 V @ 2.5 A) VDD_ANA_1P8 LDO1 (1.8 V @ 0.4 A) VDD_SD DDR memory to peripherals LDO2 (3.3 V @ 0.4 A) BUCK3 (VTT) (0.4 V - 1.8 V @ 2.5 A) to peripherals VSNVS2 (1.8 V @ 10 mA) VDD_MEMC Figure 1. Simplified application diagram |
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