MPF7100BVBA2ES datasheet(61/125 Pages) NXP

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NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

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Product data sheet

Rev. 4 — 9 March 2021

61 / 125

the OTP_SWxPHASE[2:0] registers at power up. The SWxPHASE[2:0] can be modified

during the system-on states.

Table 46. SWx phase configuration

SWx_PHASE[2:0]

Phase shift (degrees)

000

001

010

135

011

180

100

225

101

270

110

315

111

0 (default)

Each one of the buck regulator provides 2 OTP bits to configure the value of the inductor

used in the corresponding block. The OTP_SWx_LSELECT[1:0] allow to choose the

inductor as shown in the following table.

Table 47. SWx inductor selection bits

OTP_SWx_LSELECT[1:0]

Inductor value

1.0 µH

0.47 µH

1.5 µH

Reserved

15.3.1 SW3 VTT operation

SW3 features a selectable VTT mode to create VTT termination for DDR memories.

When SW3_VTTEN = 1, the VTT mode is enabled. In this mode, SW3 reference voltage

is internally connected to SW4FB output through a divider by 2.

During the VTT mode, the DVS operation on SW3 is disabled and SW3 output is given

by VSW4FB / 2. In this mode, the minimum output voltage configuration for SW4 should be

800 mV to ensure that the SW3 is still within the regulation range at its output.

During the power-up sequence, the SW3 (VTT) may be turned on in the same or at a

slot later than SW4, as required by the system. When SW3 and SW4 are enabled in the

same slot, SW3 always tracks the VSW4/2. When SW3 is enabled after SW4, it ramps

up gradually to a predefined voltage and once this voltage is reached, it starts tracking

VSW4/2. The user may adjust the value at which the SW3 should start tracking the

voltage on the SW4 regulator by setting the OTP_VSW3 register accordingly.

During normal operation, if the SW4 is disabled via the I2C command, SW3 tracks the

output of SW4 and both regulators are discharged together and pulled down internally.

When SW4 is enabled back via the I2C commands, the SW3 output ramps up to the

corresponding voltage while SW3 is always VSW4/2.

When only SW3 is disabled, the PMIC uses the OTP_VTT_PDOWN bit to program

whether the SW3 regulator is disabled with the output in high impedance or discharged

internally.

• When OTP_VTT_PDOWN = 0, the output is disabled in high impedance mode.

MPF7100BVBA2ES Datasheet(PDF) 61 Page - NXP Semiconductors

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