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MPF7100BVBA2ES Datasheet(PDF) 77 Page - NXP Semiconductors |
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MPF7100BVBA2ES Datasheet(HTML) 77 Page - NXP Semiconductors |
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77 / 125 page ![]() NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 77 / 125 • When the VMON_EN bit of a specific regulator is 1, the voltage monitor for that specific regulator is enabled. • When the VMON_EN bit of a specific regulator is 0, the voltage monitor for that specific regulator is disabled. By default, the VMON_EN bits are set to 1 on power up. When the I2C_SECURE_EN = 1, a secure write must be performed to set or clear the VMON_EN bits to enable or disable the voltage monitoring for a specific regulator. On enabling a regulator, the UV/OV monitor is masked until the corresponding regulator reaches the point of regulation. If a voltage monitor is disabled, the UV_S and OV_S indicators from that monitor are reset to 0. 15.6.1 Voltage monitoring architecture Figure 31 shows the voltage monitoring architecture. |
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