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MPF7100BVBA2ES Datasheet(PDF) 103 Page - NXP Semiconductors |
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MPF7100BVBA2ES Datasheet(HTML) 103 Page - NXP Semiconductors |
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103 / 125 page  NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 103 / 125 AD DR Register name BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 B0 OTP RESETBMCU PWRUP OTP_RESETBMCU_SEQ[7:0] B1 OTP PGOOD PWRUP OTP_PGOOD_SEQ[7:0] B2 OTP SW1 VOLT OTP_VSW1[7:0] B3 OTP SW1 PWRUP OTP_SW1_SEQ[7:0] B4 OTP SW1 CONFIG1 OTP_SW1UV_TH[1:0] OTP_SW1OV_TH[1:0] OTP_SW1_PDGRP[1:0] OTP_SW1ILIM[1:0] B5 OTP SW1 CONFIG2 OTP_SW1_LSELECT[1:0] OTP_SW1PHASE[2:0] — OTP_SW1_PG_EN OTP_SW1_WDBYPASS B6 OTP SW2 VOLT OTP_VSW2[7:0] B7 OTP SW2 PWRUP OTP_SW2_SEQ[7:0] B8 OTP SW2 CONFIG1 OTP_SW2UV_TH[1:0] OTP_SW2OV_TH[1:0] OTP_SW2_PDGRP[1:0] OTP_SW2ILIM[1:0] B9 OTP SW2 CONFIG2 OTP_SW2_LSELECT[1:0] OTP_SW2PHASE[2:0] — OTP_SW2_PG_EN OTP_SW2_WDBYPASS BA OTP SW3_ VOLT OTP_VSW3[7:0] BB OTP SW3 PWRUP OTP_SW3_SEQ[7:0] BC OTP SW3 CONFIG1 OTP_SW3UV_TH[1:0] OTP_SW3OV_TH[1:0] OTP_SW3_PDGRP[1:0] OTP_SW3ILIM[1:0] BD OTP SW3 CONFIG2 OTP_SW3_LSELECT[1:0] OTP_SW3PHASE[2:0] — OTP_SW3_PG_EN OTP_SW3_WDBYPASS BE OTP SW4 VOLT OTP_VSW4[7:0] BF OTP SW4 PWRUP OTP_SW4_SEQ[7:0] C0 OTP SW4 CONFIG1 OTP_SW4UV_TH[1:0] OTP_SW4OV_TH[1:0] OTP_SW4_PDGRP[1:0] OTP_SW4ILIM[1:0] C1 OTP SW4 CONFIG2 OTP_SW4_LSELECT[1:0] OTP_SW4PHASE[2:0] — OTP_SW4_PG_EN OTP_SW4_WDBYPASS CA OTP SW5 VOLT — — — OTP_VSW5[4:0] CB OTP SW5 PWRUP OTP_SW5_SEQ[7:0] CC OTP SW5 CONFIG1 OTP_SW5UV_TH[1:0] OTP_SW5OV_TH[1:0] OTP_SW5_PDGRP[1:0] OTP_SW5ILIM[1:0] CD OTP SW5 CONFIG2 OTP_SW5_LSELECT[1:0] OTP_SW5PHASE[2:0] — OTP_SW5_PG_EN OTP_SW5_WDBYPASS CE OTP LDO1 VOLT OTP_LDO1UV_TH[1:0] OTP_LDO1OV_TH[1:0] OTP_VLDO1[3:0] CF OTP LDO1 PWRUP OTP_LDO1_SEQ[7:0] D0 OTP LDO1 CONFIG OTP_LDO1_PDGRP[1:0] — — — OTP_LDO1_PG_EN OTP_LDO1_ WDBYPASS OTP_LDO1LS D1 OTP LDO2 VOLT OTP_LDO2UV_TH[1:0] OTP_LDO2OV_TH[1:0] OTP_VLDO2[3:0] D2 OTP LDO2 PWRUP OTP_LDO2_SEQ[7:0] D3 OTP LDO2 CONFIG OTP_LDO2_PDGRP[1:0] OTP_VSELECT_EN OTP_LDO2HW_EN — OTP_LDO2_PG_EN OTP_LDO2_ WDBYPASS OTP_LDO2LS DA OTP VSNVS CONFIG — — — — OTP_VSNVS2VOLT [1:0] OTP_VSNVS1VOLT[1:0] DB OTP_OV_ BYPASS1 — OTP_SW5_ OVBYPASS — — OTP_SW4_ OVBYPASS OTP_SW3_ OVBYPASS OTP_SW2_ OVBYPASS OTP_SW1_OVBYPASS DC OTP_OV_ BYPASS2 — — — — — — OTP_LDO2_ OVBYPASS OTP_LDO1_ OVBYPASS DD OTP_UV_ BYPASS1 — OTP_SW5_ UVBYPASS — — OTP_SW4_ UVBYPASS OTP_SW3_ UVBYPASS OTP_SW2_ UVBYPASS OTP_SW1_UVBYPASS DE OTP_UV_ BYPASS2 — — — — — — OTP_LDO2_ UVBYPASS OTP_LDO1_ UVBYPASS DF OTP_ILIM_ BYPASS1 — OTP_SW5_ ILIMBYPASS — — OTP_SW4_ ILIMBYPASS OTP_SW3_ ILIMBYPASS OTP_SW2_ ILIMBYPASS OTP_SW1_ ILIMBYPASS |
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