MPF7100BVMA2ES datasheet(47/125 Pages) NXP

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NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

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Product data sheet

Rev. 4 — 9 March 2021

47 / 125

• When the PG_EN = 1, the corresponding regulator becomes part of the AND function

that controls the PGOOD pin.

• When the PG_EN = 0, the corresponding regulator does not control the status of the

PGOOD pin.

The PGOOD pin is pulled low when any of the selected regulator outputs falls above

or below the programmed OV/UV thresholds and the corresponding OV/UV interrupt is

generated. If the faulty condition is removed, the corresponding OV_S/UV_S bit goes low

to indicate the output is back in regulation, however, the interrupt remains latched until it

is cleared.

The actual condition causing the interrupt (OV, UV) can be read in the fault interrupt

registers. For more details on handling interrupts, see Section 14.8 "Interrupt

management".

When a particular regulator is disabled (via OTP, or I2C, or by change in state of PMIC

such as going to standby mode), it no longer controls the PGOOD pin.

In the OFF modes and during the power up sequence, the PGOOD pin is held low until

RESETBMCU is ready to be released, at this point, the PG monitors are unmasked and

the PGOOD pin is released high if all the internal PG monitors are in regulation. In the

event that one or more outputs are not in regulation by the time RESETBMCU is ready to

de-assert, the PGOOD pin is held low and the PF7100 performs the corresponding fault

protection mechanism as described in Section 14.7.1 "Fault monitoring during power up

state".

14.9.9 VSELECT

VSELECT is an input pin used to select the output voltage of LDO2 when bit

VSELECT_EN = 1.

• When VSELECT pin is low, the LDO2 output is programmed to 3.3 V.

• When VSELECT pin is high, the LDO2 output is programmed to 1.8 V.

When VSELECT_EN = 0, the output of LDO2 is given by the VLDO2_RUN[3:0] bits.

When the PF7100 is in the standby mode, the output voltage of LDO2 follows the

configuration as selected by the VLDO2_STBY[3:0] bits, regardless of the value of

VSELECT_EN bit.

The default value of the VSELECT_EN bit is programmed by the OTP_VSELECT_EN bit

in the OTP fuses.

A read-only bit is provided to monitor the actual state of the VSELECT pin. When the

VSELECT pin is low, the VSELECT_S bit is 0 and when the VSELECT pin is high, the

VSELECT_S bit is set to 1.

14.9.10 LDO2EN

LDO2EN is an input pin used to enable or disable LDO2 when the bit LDO2HW_EN = 1.

When LDO2HW_EN = 1, the status of LDO2 output can also be controlled by the

LDO2_RUN_EN bit in the run mode or the LDO2_STBY_EN bit in the standby mode.

Table 34. LDO control in run or standby mode

LDO2EN pin

LDO2HW_EN bit

LDO2_RUN_EN

LDO2_STBY_EN

LDO2 output

Do not care

Disabled

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