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MPF7100BVMA2ES Datasheet(PDF) 8 Page - NXP Semiconductors |
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MPF7100BVMA2ES Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 125 page ![]() NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 8 / 125 12 General description 12.1 Features The PF7100 is a power management integrated circuit (PMIC) designed to be the primary power management building block for NXP high-end multimedia application processors from the i.MX 8 series. It is also capable of providing power solution to the high end i.MX 6 series as well as several non-NXP processors. • Buck regulators – SW1, SW2, SW3, SW4: 0.4 V to 1.8 V; 2500 mA; 2 % accuracy – SW5; 1.0 V to 4.1 V; 2500 mA; 2 % accuracy – Dynamic voltage scaling on SW1, SW2, SW3, SW4, – SW1, SW2 configurable as a dual phase regulator – SW3, SW4 configurable as a dual phase regulator – SW1, SW2, and SW3 configurable as a triple phase regulator with up to 7.5 A current capability – SW1, SW2, SW3, and SW4 configurable as a quad phase regulator with up to 10 A current capability – VTT termination mode on SW3 – Programmable current limit – Spread-spectrum and manual tuning of switching frequency • LDO regulators – LDO1, 0.8 V to 5.0 V, 400 mA: 3 % accuracy with optional load switch mode – LDO2, 0.8 V to 5.0 V, 400 mA; 3 % accuracy with optional load switch mode and selectable hardware/software control • 2 RTC LDO supply – VSNVS1, 1.8 V/3.0 V/3.3 V, 10 mA – VSNVS2, 0.8 V/0.9 V/1.8 V, 10 mA • System features – Fast PMIC startup – Advanced state machine for seamless processor interface – High speed I2C interface support (up to 3.4 MHz) – PGOOD monitor – User programmable standby and off modes – Programmable soft start sequence and power down sequence – Programmable regulator configuration – Analog multiplexer for smart system monitoring/diagnostic • OTP (one-time programmable) memory for device configuration • Monitoring circuit to fit ASIL B safety level – Independent voltage monitoring with programmable fault protection – Advance thermal monitoring and protection – External watchdog monitoring and programmable internal watchdog counter – I2C CRC and write protection mechanism – Analog built-in self-test (ABIST) |
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