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PIC16F7X7 Datasheet(PDF) 29 Page - Microchip Technology |
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PIC16F7X7 Datasheet(HTML) 29 Page - Microchip Technology |
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29 / 276 page ![]() 2004 Microchip Technology Inc. DS30498C-page 27 PIC16F7X7 2.2.2.7 PIR2 Register The PIR2 register contains the flag bits for the CCP2 interrupt. REGISTER 2-7: PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2 (ADDRESS 0Dh) Note: Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the Global Interrupt Enable bit, GIE (INTCON<7>). User software should ensure the appropri- ate interrupt flag bits are clear prior to enabling an interrupt. R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0 R/W-0 R/W-0 OSFIF CMIF LVDIF —BCLIF — CCP3IF CCP2IF bit 7 bit 0 bit 7 OSFIF: Oscillator Fail Interrupt Flag bit 1 = System oscillator failed, clock input has changed to INTRC (must be cleared in software) 0 = System clock operating bit 6 CMIF: Comparator Interrupt Flag bit 1 = Comparator input has changed (must be cleared in software) 0 = Comparator input has not changed bit 5 LVDIF: Low-Voltage Detect Interrupt Flag bit 1 = The supply voltage has fallen below the specified LVD voltage (must be cleared in software) 0 = The supply voltage is greater then the specified LVD voltage bit 4 Unimplemented: Read as ‘0’ bit 3 BCLIF: Bus Collision Interrupt Flag bit 1 = A bus collision has occurred in the SSP when configured for I2C Master mode 0 = No bus collision has occurred bit 2 Unimplemented: Read as ‘0’ bit 1 CCP3IF: CCP3 Interrupt Flag bit Capture mode: 1 = A TMR1 register capture occurred (must be cleared in software) 0 = No TMR1 register capture occurred Compare mode: 1 = A TMR1 register compare match occurred (must be cleared in software) 0 = No TMR1 register compare match occurred PWM mode: Unused in this mode. bit 0 CCP2IF: CCP2 Interrupt Flag bit Capture mode: 1 = A TMR1 register capture occurred (must be cleared in software) 0 = No TMR1 register capture occurred Compare mode: 1 = A TMR1 register compare match occurred (must be cleared in software) 0 = No TMR1 register compare match occurred PWM mode: Unused. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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