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PIC16F7X7 Datasheet(PDF) 73 Page - Microchip Technology |
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PIC16F7X7 Datasheet(HTML) 73 Page - Microchip Technology |
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73 / 276 page ![]() 2004 Microchip Technology Inc. DS30498C-page 71 PIC16F7X7 FIGURE 5-21: PARALLEL SLAVE PORT WRITE WAVEFORMS FIGURE 5-22: PARALLEL SLAVE PORT READ WAVEFORMS TABLE 5-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT Q1 Q2 Q3 Q4 CS Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 WR RD IBF OBF PSPIF PORTD<7:0> Q1 Q2 Q3 Q4 CS Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 WR IBF PSPIF RD OBF PORTD<7:0> Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets 08h PORTD Port Data Latch when written: Port pins when read xxxx xxxx uuuu uuuu 09h PORTE — — — — RE3 RE2 RE1 RE0 ---- x000 ---- x000 89h TRISE IBF OBF IBOV PSPMODE —(2) PORTE Data Direction bits 0000 1111 0000 1111 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 9Fh ADCON1 ADFM ADCS2 VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F737/767; always maintain these bits clear. 2: RE3 is an input only. The state of the TRISE3 bit has no effect and will always read ‘1’. |
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