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PIC16F7X7 Datasheet(PDF) 84 Page - Microchip Technology

Part # PIC16F7X7
Description  28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  276 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F7X7 Datasheet(HTML) 84 Page - Microchip Technology

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PIC16F7X7
DS30498C-page 82
 2004 Microchip Technology Inc.
7.9
Resetting Timer1 Register Pair
(TMR1H, TMR1L)
TMR1H and TMR1L registers are not reset to 00h on a
POR, or any other Reset, except by the CCP1 special
event triggers.
T1CON register is reset to 00h on a Power-on Reset or
a Brown-out Reset, which shuts off the timer and
leaves a 1:1 prescale. In all other Resets, the register
is unaffected.
7.10
Timer1 Prescaler
The prescaler counter is cleared on writes to the
TMR1H or TMR1L registers.
7.11
Using Timer1 as a Real-Time Clock
Adding an external LP oscillator to Timer1 (such as the
one described in Section 7.6 “Timer1 Oscillator”)
gives users the option to include RTC functionality in
their applications. This is accomplished with an inex-
pensive watch crystal to provide an accurate time base
and several lines of application code to calculate the
time. When operating in Sleep mode and using a
battery or supercapacitor as a power source, it can
completely eliminate the need for a separate RTC
device and battery backup.
The application code routine, RTCisr, shown in
Example 7-3, demonstrates a simple method to
increment a counter at one-second intervals using an
Interrupt Service Routine. Incrementing the TMR1 reg-
ister pair to overflow, triggers the interrupt and calls the
routine which increments the seconds counter by one;
additional
counters
for
minutes
and
hours
are
incremented as the previous counter overflows.
Since the register pair is 16 bits wide, counting up to
overflow the register directly from a 32.768 kHz clock
would take 2 seconds. To force the overflow at the
required one-second intervals, it is necessary to
preload it. The simplest method is to set the MSb of
TMR1H with a BSF instruction. Note that the TMR1L
register is never preloaded or altered; doing so may
introduce cumulative error over many cycles.
For this method to be accurate, Timer1 must operate in
Asynchronous mode and the Timer1 overflow interrupt
must be enabled (PIE1<0> = 1) as shown in the
routine, RTCinit. The Timer1 oscillator must also be
enabled and running at all times.
EXAMPLE 7-3:
IMPLEMENTING A REAL-TIME CLOCK USING A TIMER1 INTERRUPT SERVICE
RTCinit
BANKSEL
TMR1H
MOVLW
0x80
; Preload TMR1 register pair
MOVWF
TMR1H
; for 1 second overflow
CLRF
TMR1L
MOVLW
b’00001111’
; Configure for external clock,
MOVWF
T1CON
; Asynchronous operation, external oscillator
CLRF
secs
; Initialize timekeeping registers
CLRF
mins
MOVLW
.12
MOVWF
hours
BANKSEL
PIE1
BSF
PIE1, TMR1IE
; Enable Timer1 interrupt
RETURN
RTCisr
BANKSEL
TMR1H
BSF
TMR1H, 7
; Preload for 1 sec overflow
BCF
PIR1, TMR1IF
; Clear interrupt flag
INCF
secs, F
; Increment seconds
MOVF
secs, w
SUBLW
.60
BTFSS
STATUS, Z
; 60 seconds elapsed?
RETURN
; No, done
CLRF
seconds
; Clear seconds
INCF
mins, f
; Increment minutes
MOVF
mins, w
SUBLW
.60
BTFSS
STATUS, Z
; 60 seconds elapsed?
RETURN
; No, done
CLRF
mins
; Clear minutes
INCF
hours, f
; Increment hours
MOVF
hours, w
SUBLW
.24
BTFSS
STATUS, Z
; 24 hours elapsed?
RETURN
; No, done
CLRF
hours
; Clear hours
RETURN
; Done



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