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XC2230L Datasheet(PDF) 34 Page - Infineon Technologies AG

Part # XC2230L
Description  16/32-Bit Single-Chip Microcontroller
PDF  112 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

XC2230L Datasheet(HTML) 34 Page - Infineon Technologies AG

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XC2230L, XC2234L
XC2000 Family / Econo Line
Functional Description
Data Sheet
30
V1.3, 2015-02
3.2
Central Processing Unit (CPU)
The core of the CPU consists of a 5-stage execution pipeline with a 2-stage instruction-
fetch pipeline, a 16-bit arithmetic and logic unit (ALU), a 32-bit/40-bit multiply and
accumulate unit (MAC), a register-file providing three register banks, and dedicated
SFRs. The ALU features a multiply-and-divide unit, a bit-mask generator, and a barrel
shifter.
Figure 4
CPU Block Diagram
DPRAM
CPU
IPIP
RF
R0
R1
GPRs
R14
R15
R0
R1
GPRs
R14
R15
IFU
Injection/
Exception
Handler
ADU
MAC
mca04917_x.vsd
CPUCON1
CPUCON2
CSP
IP
Return
Stack
FIFO
Branch
Unit
Prefetch
Unit
VECSEG
TFR
+/-
IDX0
IDX1
QX0
QX1
QR0
QR1
DPP0
DPP1
DPP2
DPP3
SPSEG
SP
STKOV
STKUN
+/-
MRW
MCW
MSW
MAL
+/-
MAH
Multiply
Unit
ALU
Division Unit
Multiply Unit
Bit-Mask-Gen.
Barrel-Shifter
+/-
MDC
PSW
MDH
ZEROS
MDL
ONES
R0
R1
GPRs
R14
R15
CP
WB
Buffer
2-Stage
Prefetch
Pipeline
5-Stage
Pipeline
R0
R1
GPRs
R14
R15
PMU
DMU
DSRAM
EBC
Peripherals
PSRAM
Flash/ROM



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