XC2230L datasheet(79/112 Pages) INFINEON

79 / 112 page

XC2230L, XC2234L

XC2000 Family / Econo Line

Electrical Parameters

Data Sheet

V1.3, 2015-02

Converter Timing Example A:

Converter Timing Example B:

Table 23

A/D Converter Computation Table

GLOBCTR.5-0

(DIVA)

A/D Converter

Analog Clock

ADCI

INPCRx.7-0

(STC)

Sample Time

1) The selected sample time is doubled if broken wire detection is active (due to the presampling phase).

000000

SYS

ADCI × 2

000001

SYS / 2

ADCI × 3

000010

SYS / 3

ADCI × 4

SYS / (DIVA+1)

ADCI × (STC+2)

111110

SYS / 63

ADCI × 256

111111

SYS / 64

ADCI × 257

Assumptions:

SYS

= 80 MHz (i.e.

SYS = 12.5 ns), DIVA = 03H, STC = 00H

Analog clock

ADCI

SYS / 4 = 20 MHz, i.e. tADCI = 50 ns

Sample time

ADCI × 2 = 100 ns

Conversion 12-bit:

C12

= 16

× t

ADCI + 2 × tSYS = 16 × 50 ns + 2 × 12.5 ns = 0.825 μs

Conversion 10-bit:

C10

= 12

× t

ADCI + 2 × tSYS = 12 × 50 ns + 2 × 12.5 ns = 0.625 μs

Conversion 8-bit:

= 10

× t

ADCI + 2 × tSYS = 10 × 50 ns + 2 × 12.5 ns = 0.525 μs

Assumptions:

SYS

= 66 MHz (i.e.

SYS = 15.2 ns), DIVA = 03H, STC = 00H

Analog clock

ADCI

SYS / 4 = 16.5 MHz, i.e. tADCI = 60.6 ns

Sample time

ADCI × 2 = 121.2 ns

Conversion 12-bit:

C12

= 16

× t

ADCI + 2 × tSYS = 16 × 60.6 ns + 2 × 15.2 ns = 1.0 μs

Conversion 10-bit:

C10

= 12

× t

ADCI + 2 × tSYS = 12 × 60.6 ns + 2 × 15.2 ns = 0.758 μs

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