XC2230L datasheet(85/112 Pages) INFINEON

85 / 112 page

XC2230L, XC2234L

XC2000 Family / Econo Line

Electrical Parameters

Data Sheet

V1.3, 2015-02

Access to the XC223[04]L Flash modules is controlled by the IMB. Built-in prefetch

mechanisms optimize the performance for sequential access.

Flash access waitstates only affect non-sequential access. Due to prefetch

mechanisms, the performance for sequential access (depending on the software

structure) is only partially influenced by waitstates.

Number of erase cycles

ER SR

−−

15000

cycle

RET≥ 5 years;

Valid for up to

64 user

selected

sectors (data

storage)

−−

1000

cycle

RET≥ 20 years

1) All Flash module(s) can be erased/programmed while code is executed and/or data is read from only one Flash

module or from PSRAM. The Flash module that delivers code/data can, of course, not be erased/programmed.

2) Flash module 1 can be erased/programmed while code is executed and/or data is read from Flash module 0.

3) Value of IMB_IMBCTRL.WSFLASH.

4) Programming and erase times depend on the internal Flash clock source. The control state machine needs a

few system clock cycles. This increases the stated durations noticably only at extremely low system clock

frequencies.

Table 27

Flash Parameters (cont’d)

Parameter

Symbol

Values

Unit

Note /

Test Condition

Min.

Typ.

Max.

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