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LMP90100MHE/NOPB Datasheet(PDF) 54 Page - Texas Instruments

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Part # LMP90100MHE/NOPB
Description  LMP90100/LMP90099/LMP90098/LMP90097 Sensor AFE System: Multi-Channel, Low Power 24-Bit Sensor AFE with True Continuous Background Calibration
PDF  69 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMP90100MHE/NOPB Datasheet(HTML) 54 Page - Texas Instruments

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LMP90100
SNAS510P – JANUARY 2011 – REVISED MARCH 2013
www.ti.com
ADDR
Register Name
Type
Default
(URA & LRA)
CH6_INPUTCN
CH6 Input Control
0x2C
R/W
0x25
CH6_CONFIG
CH6 Configuration
0x2D
R/W
0x70
Reserved
-
0x2E - 0x2F
-
0x00
SYSTEM CALIBRATION REGISTERS
CH0_SCAL_OFFSET
CH0 System Calibration Offset Coefficients
0x30 - 0x32
R/W
0x00_0000
CH0_SCAL_GAIN
CH0 System Calibration Gain Coefficients
0x33 - 0x35
R/W
0x80_0000
CH0_SCAL_SCALING
CH0 System Calibration Scaling Coefficients
0x36
R/W
0x01
CH0_SCAL_BITS_SELECT
CH0 System Calibration Bits Selector
OR
0x37
R/W
0x00
CH1_SCAL_OFFSET
CH1 System Calibration Offset Coefficients
0x38 - 0x3A
R/W
0x00_0000
CH1_SCAL_GAIN
CH1 System Calibration Gain Coefficient
0x3B - 0x3D
R/W
0x80_0000
CH1_SCAL_SCALING
CH1 System Calibration Scaling Coefficients
0x3E
R/W
0x01
CH1_SCAL_BITS_SELECT
CH1 System Calibration Bits Selector
OR
0x3F
R/W
0x00
CH2_SCAL_OFFSET
CH2 System Calibration Offset Coefficients
0x40 - 0x42
R/W
0x00_0000
CH2_SCAL_GAIN
CH2 System Calibration Gain Coefficient
0x43 - 0x45
R/W
0x80_0000
CH2_SCAL_SCALING
CH2 System Calibration Scaling Coefficients
0x46
R/W
0x01
CH2_SCAL_BITS_SELECT
CH2 System Calibration Bits Selector
OR
0x47
R/W
0x00
CH3_SCAL_OFFSET
CH3 System Calibration Offset Coefficients
0x48 - 0x4A
R/W
0x00_0000
CH3_SCAL_GAIN
CH3 System Calibration Gain Coefficient
0x4B - 0x4D
R/W
0x80_0000
CH3_SCAL_SCALING
CH3 System Calibration Scaling Coefficients
0x4E
R/W
0x01
CH3_SCAL_BITS_SELECT
CH3 System Calibration Bits Selector
OR
0x4F
R/W
0x00
Reserved
-
0x50 - 0x7F
-
0x00
POWER AND RESET REGISTERS
Table 8. RESETCN: Reset Control (Address 0x00)
Bit
Bit Symbol
Bit Description
Register and Conversion Reset0xC3: Register and conversion reset
[7:0]
REG_AND_CNV_ RST
Others: Neglected
Table 9. SPI_RESET: SPI Reset Control (Address 0x02)
Bit
Bit Symbol
Bit Description
SPI Reset Enable
0x0 (default): SPI Reset Disabled
0x1: SPI Reset Enabled
[0]
SPI_ RST
Note:Once Written, The contents of this register are sticky. That is, the content of this register
cannot be changed with subsequent write.However, a Register reset clears the register as well as
the sticky status.
54
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Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LMP90100



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