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LMP90100MHE/NOPB Datasheet(PDF) 13 Page - Texas Instruments |
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LMP90100MHE/NOPB Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 69 page ![]() CSB SCLK 0.7VIO tCSHmin CSB SCLK 0.3VIO 0.7VIO tCSSUmin CSB SCLK MSB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 n LSB INST2 SDI MSB SDO/ DRDYB Data Byte (s) DRDYB is driving the pin SDO is driving the pin LSB 1/fSCLK tCL tCH LMP90100 www.ti.com SNAS510P – JANUARY 2011 – REVISED MARCH 2013 Timing Diagrams Unless otherwise noted, specified limits apply for VA = VIO = 3.0V. Boldface limits apply for TMIN ≤ TA ≤ TMAX; the typical values apply for TA = +25°C. Figure 3. Timing Diagram Symbol Parameter Conditions Min Typical Max Units fSCLK 10 MHz tCH SCLK High time 0.4 / fSCLK ns tCL SCLK Low time 0.4 / fSCLK ns Symbol Parameter Conditions Min Typical Max Units CSB Setup time prior to an SCLK tCSSU 5 ns rising edge CSB Hold time after the last rising tCSH 6 ns edge of SCLK Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LMP90100 |
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