M16CSLASH62P datasheet(29/349 Pages) MITSUBISHI

29 / 349 page

Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Reset

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

2. Limitations on WAIT Instruction

If the WAIT instruction is executed when the VC13 bit in the VCR1 register is “1” (VCC1

≥ Vdet4) while the

VC27 bit in the VCR2 register is “1” (power supply down detection circuit enable) and the D40 bit in the

D4INT register is “1” (power supply down detection interrupt enable), a power supply down detection

interrupt is immediately generated, causing the microcomputer to exit wait mode.

In systems where the microcomputer enters wait mode when the input voltage at the VCC1 pin drops

below Vdet4 and exits wait mode when the input voltage rises to Vdet4 or more, make sure the WAIT

instruction is executed when VC13 bit is “0” (VCC1 < Vdet4).

Figure 1.5.8. Power Supply Down Detection Interrupt Generation Block

Power supply down detection interrupt generation circuit

Oscillation stop,

re-oscillation

detection

interrupt signal

Watchdog timer block

This bit is set to “0”(not detected) by writing a “0” in a program.

D43

D41

CM02

WAIT instruction(wait mode)

D40

VC27

VCC1

VREF

(Rejection wide:200 ns)

VC13

“H” when VC27

bit= 0 (disabled)

Noise rejection

circuit

Digital

filter

BCLK

D42

DF1, DF0

1/2

002

012

102

112

1/2

1/8

Noise

rejection

Power supply

down

detection

signal

Watchdog timer

underflow signal

D42 bit is set to “0”(not detected) by

writing a “0” in a program. VC27 bit

is set to “0” (power supply down

detection circuit disabled), the D42

bit is set to “0”.

Power supply down detection circuit

Power supply

down detection

interrupt signal

Watchdog

timer interrupt

signal

Non-maskable

interrupt signal

Figure 1.5.9. Power Supply Down Detection Interrupt Generation Circuit Operation Example

Output of the digital filter (Note 2)

D42 bit

Note 1 : D40 is “1”(power supply down detection interrupt enabled)

Note 2 : Output of the digital filter shown in Figure 1.5.8.

Power supply down detection

interrupt signal

No power supply down detection interrupt signals

are generated when the D42 bit is “H”.

sampling

Set to “0” in a

program (not

detected)

VC13 bit

VCC1

sampling

Set to “0” in a

program (not

detected)

M16C/62P Datasheet(PDF) 29 Page - Mitsubishi Electric Semiconductor

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