M16CSLASH62P datasheet(11/349 Pages) MITSUBISHI

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Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Overview

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

Table 1.1.5 Pin Description (100-pin and 128-pin Packages) (Continued)

Signal name

Function

Pin name

I/O type

Power supply

VCC2

P50 to P57

WRL / WR,

WRH / BHE,

RD,

BCLK,

HLDA,

HOLD,

ALE,

RDY

I/O port P5

Input/output

VCC1

P60 to P67

I/O port P6

Input/output

VCC1

P70 to P77

I/O port P7

Input/output

VCC1

P80 to P84,

P87,

P85

I/O port P8

I/O port P85

Input/output

Input

Output

Input

Output

Input

This is an 8-bit I/O port equivalent to P0. In single-chip mode, P57

in this port outputs a divide-by-8 or divide-by-32 clock of XIN or a

clock of the same frequency as XCIN as selected by program.

This is an 8-bit I/O port equivalent to P0. Pins in this port also

function as UART0 and UART1 I/O pins as selected by program.

This is an 8-bit I/O port equivalent to P0 (P70 and P71 are N

channel open-drain output). This port can function as input/output

pins for timers A0 to A3 when so selected in a program.

Furthermore, P70 to P75, P71, and P72 to P75 can also function as

input/output pins for UART2, an input pin for timer B5, and output

pins for the three-phase motor control timer, respectively.

Output WRL/WR, WRH/BHE, RD, BCLK, HLDA, and ALE signals.

WRL/WR and WRH/BHE are switchable in a program. Note that

WRL and WRH are always used as a pair, so as WR and BHE.

WRL, WRH, and RD selected

If the external data bus is 16 bits wide, data are written to even

addresses when the WRL signal is low, and written to odd

addresses when the WRH signal is low. Data are read out when the

RD signal is low.

WR, BHE, and RD selected

Data are written when the WR signal is low, or read out when the

RD signal is low. Odd addresses are accessed when the BHE

signal is low. Use this mode when the external data bus is 8 bits

wide.

The microcomputer goes to a hold state when input to the HOLD

pin is held low. While in the hold state, HLDA outputs a low

level. ALE is used to latch the address. While the input level of the

RDY pin is low, the bus of the microcomputer goes to a wait state.

P80 to P84, P86, and P87 are I/O ports with the same functions as

P0. When so selected in a program, P80 to P81 and P82 to P84 can

function as input/output pins for timer A4 or output pins for the

three-phase motor control timer and INT interrupt input pins,

respectively. P86 and P87, when so selected in a program, both

can function as input/output pins for the subclock oscillator circuit.

In that case, connect a crystal resonator between P86 (XCOUT pin)

and P87 (XCIN pin).

P85 is an input-only port shared with NMI. An NMI interrupt is

generated when input on this pin changes state from high to low.

The NMI function cannot be disabled in a program.

A pull-up cannot be set for this pin.

This is an 8-bit I/O port equivalent to P0. Pins in this port also

function as SI/O3 and SI/O4 I/O pins, Timer B0 to B4 input pins, D-

A converter output pins, A-D converter input pins, or A-D trigger

input pins as selected by program.

P90 to P97

I/O port P9

Input/output VCC1

This is an 8-bit I/O port equivalent to P0. Pins in this port also

function as A-D converter input pins as selected by program.

Furthermore, P104 to P107 also function as input pins for the key

input interrupt function.

P100 to

P107

I/O port P10

Input/output VCC1

P86,

Input/output

Table 1.1.6 Pin Description (3) (128-pin Package) (Continued)

P110 to P117

Signal name

I/O port P11

Pin name

I/O type

Input/output

P120 to P127 I/O port P12 Input/output

P130 to P137 I/O port P13 Input/output

P140, P141

I/O port P14

Function

This is an 8-bit I/O port equivalent to P0.

This is an 2-bit I/O port equivalent to P0.

Input/output

Power supply

circuit block

VCC2

VCC1

M16C/62P Datasheet(PDF) 11 Page - Mitsubishi Electric Semiconductor

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