M16CSLASH62P datasheet(56/349 Pages) MITSUBISHI

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Clock Generation Circuit

Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

CM20

CM21

Oscillation stop detection register (Note 1)

Symbol

Address

After reset

CM2

000C16

0X0000002(Note 11)

Bit name

Function

Bit symbol

System clock select bit 2

(Notes 2, 3, 6, 8, 11)

0: Oscillation stop, re-oscillation

detection function disabled

1: Oscillation stop, re-oscillation

detection function enabled

0: Main clock or PLL clock (Ring

oscillator turned off)

1: Ring oscillator clock

(Ring oscillator oscillating)

Oscillation stop, re-

oscillation detection bit

(Notes 7, 9, 10, 11)

Note 1: Write to this register after setting the PRC0 bit of PRCR register to “1” (write enable).

Note 2: When the CM20 bit is “1” (oscillation stop, re-oscillation detection function enabled), the CM27 bit is “1”

(oscillation stop, re-oscillation detection interrupt), and the CPU clock source is the main clock, the

CM21 bit is set to “1” (ring oscillator clock) if the main clock stop is detected.

Note 3: If the CM20 bit is “1” and the CM23 bit is “1” (main clock turned off), do not set the CM21 bit to “0”.

Note 4: This bit becomes “1” at main clock stop detection and main clock re-oscillation detection. When this bit

changes from “0” to “1”, there arise oscillation stop, re-oscillation detection interrupt. Use this register to

discriminate the causes for oscillation stop, re-oscillation detection interrupt and watchdog timer interrupt

in the interrupt processing program. By writing “0” in the program, this bit becomes “0”. (Even when “1” is

written in the program, no change is identified for the bit. Also, this bit is not set to “0” where there occur

oscillation stop, re-oscillation detection interrupt.) When the CM22 bit is “1”, no oscillation stop, re-

oscillation detection interrupt occur even if oscillation stop or re-oscillation is detected.

Note 5: Read the CM23 bit in an oscillation stop, re-oscillation detection interrupt handling routine to determine

the main clock status.

Note 6: Effective when the CM07 bit of CM0 register is “0”.

Note 7: When the PM21 bit of PM2 register is “1” (clock modification disabled), writing to the CM20 bit has no

effect.

Note 8: Where the CM20 bit is “1” (oscillation stop, re-oscillation detection function enabled), the CM27 bit is “1”

(oscillation stop, re-oscillation detection interrupt), and the CM11 bit is “0” (the CPU clock source is PLL

clock), the CM21 bit remains unchanged even when main clock stop is detected. If the CM22 bit is “0”

under these conditions, oscillation stop, re-oscillation detection interrupt occur at main clock stop

detection; it is, therefore, necessary to set the CM21 bit to “1” (ring oscillator clock) inside the interrupt

routine.

Note 9: Set the CM20 bit to “0” (disable) before entering stop mode. After exiting stop mode, set the CM20 bit

back to “1” (enable).

Note 10: Set the CM20 bit to “0” (disable) before setting the CM05 bit of CM0 register.

Note 11: The CM20, CM21 and CM27 bits do not change at oscillation stop detection reset.

CM22

CM23

Oscillation stop, re-

oscillation detection flag

0: Main clock stop, re-oscillation

not detected

1: Main clock stop, re-oscillation

detected

0: Main clock oscillating

1: Main clock turned off

XIN monitor flag

(Note 4)

CM27

0: Oscillation stop detection reset

1: Oscillation stop, re-oscillation

detection interrupt

Nothing is assigned. When write, set to “0”. When read, its

content is indeterminate.

Operation select bit

(when an oscillation stop,

re-oscillation is detected)

(Note 11)

(b6)

(Note 5)

Reserved bit

(b5-b4)

Must set to “0”

Figure 1.9.4. CM2 Register

M16C/62P Datasheet(PDF) 56 Page - Mitsubishi Electric Semiconductor

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