M16CSLASH62P datasheet(92/349 Pages) MITSUBISHI

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Interrupts

Mitsubishi microcomputers

M16C / 62P Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev.1.0

Specifications in this manual are tentative and subject to change.

Address Match Interrupt

An address match interrupt is generated immediately before executing the instruction at the address indi-

cated by the RMADi register (i=0 to 3). Set the start address of any instruction in the RMADi register. Use

the AIER register’s AIER0 and AIER1 bits and the AIER2 register’s AIER20 and AIER21 bits to enable or

disable the interrupt. Note that the address match interrupt is unaffected by the I flag and IPL. For address

match interrupts, the value of the PC that is saved to the stack area varies depending on the instruction

being executed. Figure 1.11.12 shows the instruction just before execution and address stored in the stack

when there occurs interruption.

Note that when using the external data bus in width of 8 bits, the address match interrupt cannot be used for

external area.

Figure 1.11.13 shows the AIER, AIER2, and RMAD0 to RMAD3 registers.

(1) Instructions in which the "return destination + 2" address is stored in the stack when address match

interrupt occurs

• 16-bit operation code

• Instruction shown below among 8-bit operation code instructions

ADD.B:S

#IMM8,dest

SUB.B:S

#IMM8,dest

AND.B:S

#IMM8,dest

OR.B:S

#IMM8,dest

MOV.B:S

#IMM8,dest

STZ.B:S

#IMM8,dest

STNZ.B:S

#IMM8,dest

STZX.B:S

#IMM81,#IMM82,dest

CMP.B:S

#IMM8,dest

PUSHM

src

POPM dest

JMPS

#IMM8

JSRS

#IMM8

MOV.B:S

#IMM,dest (However, dest = A0 or A1)

(2) Instructions in which the "return destination + 1" address is stored in the stack when address match

interrupt occurs

• Instructions other than the above

Figure 1.11.12. Instruction Just Before Execution and Address Stored in Stack When There

Occurs Interrupts

Table 1.11.6. Relationship Between Address Match Interrupt Sources and Associated Registers

Address match interrupt sources Address match interrupt enable bit

Address match interrupt register

Address match interrupt 0

AIER0

RMAD0

Address match interrupt 1

AIER1

RMAD1

Address match interrupt 2

AIER20

RMAD2

Address match interrupt 3

AIER21

RMAD3

M16C/62P Datasheet(PDF) 92 Page - Mitsubishi Electric Semiconductor

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