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M16C/62P Datasheet(PDF) 82 Page - Mitsubishi Electric Semiconductor |
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M16C/62P Datasheet(HTML) 82 Page - Mitsubishi Electric Semiconductor |
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82 / 349 page  Interrupts 81 Mitsubishi microcomputers M16C / 62P Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev.1.0 Specifications in this manual are tentative and subject to change. Figure 1.11.3. Interrupt Control Registers Symbol Address After reset INT3IC (Note 4) 004416 XX00X0002 S4IC/INT5IC 004816 XX00X0002 S3IC/INT4IC 004916 XX00X0002 INT0IC to INT2IC 005D16 to 005F16 XX00X0002 Bit name Function Bit symbol b7 b6 b5 b4 b3 b2 b1 b0 ILVL0 IR POL No functions are assigned. When writing to these bits, write “0”. The values in these bits when read are indeterminate. Interrupt priority level select bit Interrupt request bit Polarity select bit Reserved bit 0: Interrupt not requested 1: Interrupt requested 0 : Selects falling edge (Notes 3, 5) 1 : Selects rising edge Must always be set to “0” ILVL1 ILVL2 Note 1: This bit can only be reset by writing "0" (Do not write "1"). Note 2: To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register. For details, see the precautions for interrupts. Note 3: If the IFSR register’s IFSRi bit (i = 0 to 5) is "1" (both edges), set the INTiIC register’s POL bit to "0 "(falling edge). Note 4: During memory expansion and microprocessor modes, set the INT3IC register’s ILVL2 to ILVL0 bits to ‘0002’ (interrupt disabled). Note 5: Set the S3IC or S4IC register’s POL bit to "0" (falling edge) when the IFSR register’s IFSR6 bit = 0 (SI/O3 selected) or IFSR7 bit = 0 (SI/O4 selected), respectively. (Note 1) Interrupt control register (Note 2) b7 b6 b5 b4 b3 b2 b1 b0 Bit name Function Bit symbol RW Symbol Address After reset TB5IC 004516 XXXXX0002 TB4IC/U1BCNIC (Note 3) 004616 XXXXX0002 TB3IC/U0BCNIC (Note 3) 004716 XXXXX0002 BCNIC 004A16 XXXXX0002 DM0IC, DM1IC 004B16, 004C16 XXXXX0002 KUPIC 004D16 XXXXX0002 ADIC 004E16 XXXXX0002 S0TIC to S2TIC 005116, 005316, 004F16 XXXXX0002 S0RIC to S2RIC 005216, 005416, 005016 XXXXX0002 TA0IC to TA4IC 005516 to 005916 XXXXX0002 TB0IC to TB2IC 005A16 to 005C16 XXXXX0002 ILVL0 IR Interrupt priority level select bit Interrupt request bit 0 : Interrupt not requested 1 : Interrupt requested ILVL1 ILVL2 No functions are assigned. When writing to these bits, write “0”. The values in these bits when read are indeterminate. (Note 1) Note 1: This bit can only be reset by writing "0" (Do not write "1"). Note 2: To rewrite the interrupt control registers, do so at a point that does not generate the interrupt request for that register. For details, see the precautions for interrupts. Note 3: Use the IFSR2A register to select. 0 0 0 : Level 0 (interrupt disabled) 0 0 1 : Level 1 0 1 0 : Level 2 0 1 1 : Level 3 1 0 0 : Level 4 1 0 1 : Level 5 1 1 0 : Level 6 1 1 1 : Level 7 b2 b1 b0 0 0 0 : Level 0 (interrupt disabled) 0 0 1 : Level 1 0 1 0 : Level 2 0 1 1 : Level 3 1 0 0 : Level 4 1 0 1 : Level 5 1 1 0 : Level 6 1 1 1 : Level 7 b2 b1 b0 0 RW RW RW RW (b7-b4) RW RW RW RW RW RW RW RW (b7-b6) |
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