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M16C/62P Datasheet(PDF) 80 Page - Mitsubishi Electric Semiconductor |
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M16C/62P Datasheet(HTML) 80 Page - Mitsubishi Electric Semiconductor |
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80 / 349 page  Interrupts 79 Mitsubishi microcomputers M16C / 62P Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev.1.0 Specifications in this manual are tentative and subject to change. Table 1.11.2. Relocatable Vector Tables Software interrupt number Reference Note 1: Address relative to address in INTB. Note 2: Use the IFSR register's IFSR6 and IFSR7 bits to select. Note 3: During I2C mode, NACK and ACK interrupts comprise the interrupt source. Note 4: Use the IFSR2A register’s IFSR26 and IFSR27 bits to select. Note 5: These interrupts cannot be disabled using the I flag. Vector address (Note 1) Address (L) to address (H) 0 11 12 13 14 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 63 to 10 15 16 5 6 7 8 4 9 1 to 3 Interrupt source BRK instruction INT3 SI/O3, INT4 SI/O4, INT5 Timer B4, UART1 bus collision detect Timer B5 (Note 2) (Note 2) DMA0 DMA1 Key input interrupt A-D UART0 transmit, NACK0 UART0 receive, ACK0 UART1 transmit, NACK1 UART1 receive, ACK1 Timer A0 Timer A1 Timer A2 Timer A3 Timer A4 Timer B0 Timer B1 Timer B2 INT0 INT1 INT2 Software interrupt UART 2 bus collision detection UART2 transmit, NACK2 (Note 3) UART2 receive, ACK2 (Note 3) (Note 4) Timer B3, UART0 bus collision detect (Note 4) M16C/60, M16C/20 series software manual INT interrupt Timer Timer Serial I/O Serial I/O INT interrupt Serial I/O DMAC Key input interrupt A-D convertor Serial I/O Timer INT interrupt M16C/60, M16C/20 series software manual (Note 5) (Reserved) +0 to +3 (000016 to 000316) +44 to +47 (002C16 to 002F16) +48 to +51 (003016 to 003316) +52 to +55 (003416 to 003716) +56 to +59 (003816 to 003B16) +68 to +71 (004416 to 004716) +72 to +75 (004816 to 004B16) +76 to +79 (004C16 to 004F16) +80 to +83 (005016 to 005316) +84 to +87 (005416 to 005716) +88 to +91 (005816 to 005B16) +92 to +95 (005C16 to 005F16) +96 to +99 (006016 to 006316) +100 to +103 (006416 to 006716) +104 to +107 (006816 to 006B16) +108 to +111 (006C16 to 006F16) +112 to +115 (007016 to 007316) +116 to +119 (007416 to 007716) +120 to +123 (007816 to 007B16) +124 to +127 (007C16 to 007F16) +128 to +131 (008016 to 008316) +252 to +255 (00FC16 to 00FF16) +40 to +43 (002816 to 002B16) +60 to +63 (003C16 to 003F16) +64 to +67 (004016 to 004316) +20 to +23 (001416 to 001716) +24 to +27 (001816 to 001B16) +28 to +31 (001C16 to 001F16) +32 to +35 (002016 to 002316) +16 to +19 (001016 to 001316) +36 to +39 (002416 to 002716) to (Note 3) (Note 3) (Note 3) (Note 3) (Note 5) • Relocatable Vector Tables The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector table area. Table 1.11.2 lists the relocatable vector tables. Setting an even address in the INTB regis- ter results in the interrupt sequence being executed faster than in the case of odd addresses. |
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