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M16C/62P Datasheet(PDF) 95 Page - Mitsubishi Electric Semiconductor |
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M16C/62P Datasheet(HTML) 95 Page - Mitsubishi Electric Semiconductor |
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95 / 349 page ![]() Mitsubishi microcomputers M16C / 62P Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Interrupts 94 Under development Preliminary Specifications Rev.1.0 Specifications in this manual are tentative and subject to change. Example 1: INT_SWITCH1: FCLR I ; Disable interrupts. AND.B #00h, 0055h ; Set the TA0IC register to “0016”. NOP ; Four NOP instructions are required when using HOLD function. NOP FSET I ; Enable interrupts. Example 2: INT_SWITCH2: FCLR I ; Disable interrupts. AND.B #00h, 0055h ; Set the TA0IC register to “0016”. MOV.W MEM, R0 ; Dummy read. FSET I ; Enable interrupts. Example 3: INT_SWITCH3: PUSHC FLG ; Push Flag register onto stack FCLR I ; Disable interrupts. AND.B #00h, 0055h ; Set the TA0IC register to “0016”. POPC FLG ; Enable interrupts. Why the FSET I instruction is preceded by two NOP instructions (four when using HOLD function) in Example 1 and why the FSET I instruction is preceded by a dummy read in Example 2 This is to prevent the I flag from being set to “1” before writing to the interrupt control register for reasons of the instruction queue buffer. (5) Watchdog Timer Interrupt • Initialize the watchdog timer after the watchdog timer interrupt occurs. (6) Modifying Interrupt Control Register • Each interrupt control register can only be modified while no interrupt requests corresponding to that register are generated. If interrupt requests managed by any interrupt control register are likely to occur, disable the interrupts before modifying the register. A sample program is shown below. To modify any interrupt control register after disabling interrupts, be careful with the instructions used. Modifying other than the IR bit If an interrupt request corresponding to that register is generated while executing the instruction, the IR bit may not be set to “1” (= interrupt requested), with the result that the interrupt request is ignored. If this presents a problem, use the following instructions to modify the register. Instructions to use: AND, OR, BCLR, BSET Modifying the IR bit Even when the IR bit is cleared to “0” (= interrupt not requested), it may not actually be cleared to “0” depending on the instruction used. Therefore, use the MOV instruction to clear the IR bit. |
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