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PIC16F7X7 Datasheet(PDF) 171 Page - Microchip Technology |
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PIC16F7X7 Datasheet(HTML) 171 Page - Microchip Technology |
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171 / 276 page ![]() 2004 Microchip Technology Inc. DS30498C-page 169 PIC16F7X7 15.0 SPECIAL FEATURES OF THE CPU These devices have a host of features intended to maximize system reliability, minimize cost through elimi- nation of external components, provide power-saving operating modes and offer code protection: • Reset - Power-on Reset (POR) - Power-up Timer (PWRT) - Oscillator Start-up Timer (OST) - Brown-out Reset (BOR) - Low-Voltage Detect (LVD) • Interrupts • Watchdog Timer (WDT) • Two-Speed Start-up • Fail-Safe Clock Monitor • Sleep • Code Protection • ID Locations • In-Circuit Serial Programming There are two timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer (OST), intended to keep the chip in Reset until the crystal oscillator is stable. The other is the Power-up Timer (PWRT) which provides a fixed delay of 72 ms (nominal) on power-up only. It is designed to keep the part in Reset while the power supply stabilizes and is enabled or disabled using a configuration bit. With these two timers on-chip, most applications need no external Reset circuitry. Sleep mode is designed to offer a very low-current power-down mode. The user can wake-up from Sleep through external Reset, Watchdog Timer wake-up or through an interrupt. Several oscillator options are also made available to allow the part to fit the application. The RC oscillator option saves system cost while the LP crystal option saves power. Configuration bits are used to select the desired oscillator mode. Additional information on special features is available in the “PICmicro® Mid-Range MCU Family Reference Manual” (DS33023). 15.1 Configuration Bits The configuration bits can be programmed (read as ‘0’) or left unprogrammed (read as ‘1’) to select various device configurations. These bits are mapped in program memory locations 2007h and 2008h. The user will note that address 2007h is beyond the user program memory space which can be accessed only during programming. |
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