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PIC16F7X7 Datasheet(PDF) 187 Page - Microchip Technology |
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PIC16F7X7 Datasheet(HTML) 187 Page - Microchip Technology |
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187 / 276 page ![]() 2004 Microchip Technology Inc. DS30498C-page 185 PIC16F7X7 15.15.1 INT INTERRUPT External interrupt on the RB0/INT pin is edge-triggered, either rising if bit INTEDG (OPTION_REG<6>) is set or falling if the INTEDG bit is clear. When a valid edge appears on the RB0/INT pin, flag bit INT0IF (INTCON<1>) is set. This interrupt can be disabled by clearing enable bit, INT0IE (INTCON<4>). Flag bit INT0IF must be cleared in software in the Interrupt Service Routine before re-enabling this interrupt. The INT interrupt can wake-up the processor from Sleep if bit INT0IE was set prior to going into Sleep. The status of Global Interrupt Enable bit, GIE, decides whether or not the processor branches to the interrupt vector following wake-up. See Section 15.18 “Power-Down Mode (Sleep)” for details on Sleep mode. 15.15.2 TMR0 INTERRUPT An overflow (FFh → 00h) in the TMR0 register will set flag bit, TMR0IF (INTCON<2>). The interrupt can be enabled/disabled by setting/clearing enable bit, TMR0IE (INTCON<5>), see Section 6.0 “Timer0 Module”. 15.15.3 PORTB INTCON CHANGE An input change on PORTB<7:4> sets flag bit, RBIF (INTCON<0>). The interrupt can be enabled/disabled by setting/clearing enable bit, RBIE (INTCON<4>), see Section 2.2 “Data Memory Organization”. 15.16 Context Saving During Interrupts During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to save key registers during an interrupt (i.e., W, Status registers). Since the upper 16 bytes of each bank are common in the PIC16F7X7 devices, temporary holding registers, W_TEMP, STATUS_TEMP and PCLATH_TEMP, should be placed in here. These 16 locations don’t require banking and therefore, make it easier for context save and restore. The same code shown in Example 15-1 can be used. EXAMPLE 15-1: SAVING STATUS AND W REGISTERS IN RAM MOVWF W_TEMP ;Copy W to TEMP register SWAPF STATUS, W ;Swap status to be saved into W CLRF STATUS ;bank 0, regardless of current bank, Clears IRP,RP1,RP0 MOVWF STATUS_TEMP ;Save status to bank zero STATUS_TEMP register : :(ISR) ;Insert user code here : SWAPF STATUS_TEMP, W ;Swap STATUS_TEMP register into W ;(sets bank to original state) MOVWF STATUS ;Move W into STATUS register SWAPF W_TEMP, F ;Swap W_TEMP SWAPF W_TEMP, W ;Swap W_TEMP into W |
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