PIC24FJ256DA206 datasheet(28/408 Pages) MICROCHIP

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PIC24FJ256DA210 FAMILY

DS39969B-page 28

 2010 Microchip Technology Inc.

RD0

I/O

PORTD Digital I/O.

RD1

A11

I/O

RD2

A10

I/O

RD3

I/O

RD4

I/O

RD5

I/O

RD6

I/O

RD7

I/O

RD8

I/O

RD9

E10

I/O

RD10

D11

I/O

RD11

C11

I/O

RD12

—

I/O

RD13

—

I/O

RD14

—

I/O

RD15

—

I/O

RE0

I/O

PORTE Digital I/O.

RE1

I/O

RE2

I/O

RE3

I/O

RE4

100

I/O

RE5

I/O

RE6

I/O

RE7

I/O

RE8

—

I/O

RE9

—

I/O

REFO

—

Reference Clock Output.

RF0

I/O

PORTF Digital I/O.

RF1

I/O

RF2

—

K11

I/O

RF3

K10

I/O

RF4

L10

I/O

RF5

L11

I/O

RF7

I/O

RF8

—

J10

I/O

RF12

—

I/O

RF13

—

I/O

TABLE 1-3:

PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)

Function

Pin Number

I/O

Input

Buffer

Description

64-Pin

TQFP/QFN

100-Pin

TQFP

121-Pin

BGA

Legend:

TTL = TTL input buffer

ST = Schmitt Trigger input buffer

ANA = Analog level input/output

I2C™ = I2C/SMBus input buffer

Note 1:

The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.

The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.

The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.

The alternate VREF pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.

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