PIC24FJ256DA206 datasheet(29/408 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS39969B-page 29

PIC24FJ256DA210 FAMILY

RG0

—

I/O

PORTG Digital I/O.

RG1

—

I/O

RG2

H10

I/O

RG3

J11

I/O

RG6

I/O

RG7

I/O

RG8

I/O

RG9

I/O

RG12

—

I/O

RG13

—

I/O

RG14

—

I/O

RG15

—

I/O

RP0

I/O

Remappable Peripheral (input or output).

RP1

I/O

RP2

I/O

RP3

D11

I/O

RP4

E10

I/O

RP5

—

I/O

RP6

I/O

RP7

I/O

RP8

I/O

RP9

I/O

RP10

L10

I/O

RP11

I/O

RP12

C11

I/O

RP13

I/O

RP14

I/O

RP15

—

J10

I/O

RP16

K10

I/O

RP17

L11

I/O

RP18

I/O

RP19

I/O

TABLE 1-3:

PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)

Function

Pin Number

I/O

Input

Buffer

Description

64-Pin

TQFP/QFN

100-Pin

TQFP

121-Pin

BGA

Legend:

TTL = TTL input buffer

ST = Schmitt Trigger input buffer

ANA = Analog level input/output

I2C™ = I2C/SMBus input buffer

Note 1:

The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.

The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.

The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.

The alternate VREF pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.

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