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PIC24FJ256DA206 Datasheet(PDF) 48 Page - Microchip Technology |
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PIC24FJ256DA206 Datasheet(HTML) 48 Page - Microchip Technology |
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48 / 408 page ![]() PIC24FJ256DA210 FAMILY DS39969B-page 48 2010 Microchip Technology Inc. 4.2.1 DATA SPACE WIDTH The data memory space is organized in byte-addressable, 16-bit wide blocks. Data is aligned in data memory and registers as 16-bit words, but all data space EAs resolve to bytes. The Least Significant Bytes (LSBs) of each word have even addresses, while the Most Significant Bytes (MSBs) have odd addresses. FIGURE 4-3: DATA SPACE MEMORY MAP FOR PIC24FJ256DA210 FAMILY DEVICES(4) Note 1: 24-Kbyte RAM variants (PIC24FJXXXDA1XX devices have implemented RAM only up to 0x67FF). 2: Valid only for 96-Kbyte RAM variants (PIC24FJXXXDA2XX). 3: Valid only for variants with the EPMP module (PIC24FJXXXDAX10). 4: Data memory areas are not shown to scale. 0000h 07FEh FFFEh LSB Address LSB MSB MSB Address 0001h 07FFh 1FFFh FFFFh 8001h 8000h 7FFFh 0801h 0800h 2001h Near 1FFEh SFR SFR Space 30 Kbytes Data RAM 2000h 7FFEh EDS Window Space Data Space Lower 32 Kbytes Data Space EDS Page 0x1 EDS Page 0x2 EDS Page 0x3 (2 KB) EDS Page 0x4 EDS Page 0x200 EDS Page 0x300 EDS Page 0x1FF EDS Page 0x2FF EDS Page 0x3FF Internal Extended Data RAM(66 Kbytes)(2) Program Space Visibility Area to Access Lower Word of Program Memory EPMP Memory Space(3) Program Space Visibility Area to Access Upper Word of Program Memory Upper 32 Kbytes Data Space (32 KB) (32 KB) 67FEh(1) 67FFh(1) |
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