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SPMC68CK338CPV14 Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc |
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SPMC68CK338CPV14 Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc |
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63 / 133 page ![]() MC68CK338 MOTOROLA MC68CK338TS/D 63 DDRQS determines the direction of the TXD pin only when the SCI transmitter is disabled. When the SCI transmitter is enabled, the TXD pin is an output. NOTES: 1. PQS2 is a digital I/O pin unless the SPI is enabled (SPE in SPCR1 set), in which case it becomes SPI serial clock SCK. 2. PQS7 is a digital I/O pin unless the SCI transmitter is enabled (TE in SCCR1 = 1), in which case it becomes SCI serial output TXD. Table 38 Effect of DDRQS on QSM Pin Function QSM Pin Mode DDRQS Bit Bit State Pin Function MISO Master DDQ0 0 Serial data input to QSPI 1 Disables data input Slave 0 Disables data output 1 Serial data output from QSPI MOSI Master DDQ1 0 Disables data output 1 Serial data output from QSPI Slave 0 Serial data input to QSPI 1 Disables data input SCK1 Master DDQ2 0 Disables clock output 1 Clock output from QSPI Slave 0 Clock input to QSPI 1 Disables clock Input PCS0/SS Master DDQ3 0 Assertion causes mode fault 1 Chip-select output Slave 0 QSPI slave select input 1 Disables select input PCS[3:1] Master DDQ[4:6] 0 Disables chip-select output 1 Chip-select output Slave 0 Inactive 1 Inactive TXD2 Transmit DDQ7 X Serial data output from SCI RXD Receive None NA Serial data input to SCI Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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