SPMC68CK338CPV14 datasheet(72/133 Pages) FREESCALE

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MOTOROLA

MC68CK338

MC68CK338TS/D

5.5.4 Operating Modes

The QSPI operates in either master or slave mode. Master mode is used when the MCU originates data

transfers. Slave mode is used when an external device initiates serial transfers to the MCU through the

QSPI. Switching between the modes is controlled by MSTR in SPCR0. Before entering either mode,

appropriate QSM and QSPI registers must be properly initialized.

In master mode, the QSPI executes a queue of commands defined by control bits in each command

RAM queue entry. Chip-select pins are activated, data is transmitted from transmit RAM and received

into receive RAM.

In slave mode, operation proceeds in response to SS pin activation by an external bus master. Opera-

tion is similar to master mode, but no peripheral chip selects are generated, and the number of bits

transferred is controlled in a different manner. When the QSPI is selected, it automatically executes the

next queue transfer to exchange data with the external device correctly.

Although the QSPI inherently supports multi-master operation, no special arbitration mechanism is pro-

vided. A mode fault flag (MODF) indicates a request for SPI master arbitration. System software must

provide arbitration. Note that unlike previous SPI systems, MSTR is not cleared by a mode fault being

set, nor are the QSPI pin output drivers disabled. The QSPI and associated output drivers must be dis-

abled by clearing SPE in SPCR1.

5.6 SCI Submodule

The SCI submodule is used to communicate with external devices through an asynchronous serial bus.

The SCI is fully compatible with the SCI systems found on other Motorola MCUs, such as the M68HC11

and M68HC05 Families.

5.6.1 SCI Pins

There are two unidirectional pins associated with the SCI. The SCI controls the transmit data (TXD) pin

when enabled, whereas the receive data (RXD) pin remains a dedicated input pin to the SCI. TXD is

available as a general-purpose I/O pin when the SCI transmitter is disabled. When used for I/O, TXD

can be configured either as input or output, as determined by QSM register DDRQS.

Table 42 shows SCI pins and their functions.

5.6.2 SCI Registers

The SCI programming model includes QSM global and pin control registers, and four SCI registers.

There are two SCI control registers, one status register, and one data register. All registers can be read

or written at any time by the CPU.

Changing the value of SCI control bits during a transfer operation may disrupt operation. Before chang-

ing register values, allow the transmitter to complete the current transfer, then disable the receiver and

transmitter. Status flags in the SCSR may be cleared at any time.

Table 42 SCI Pins

Pin Names

Mnemonics

Mode

Function

Receive data

RXD

Receiver disabled

Receiver enabled

Not used

Serial data input to SCI

Transmit data

TXD

Transmitter disabled

Transmitter enabled

General-purpose I/O

Serial data output from SCI

Freescale Semiconductor, Inc.

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