| Electronic Components Datasheet Search |
|
SPMC68CK338CPV14 Datasheet(PDF) 87 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
SPMC68CK338CPV14 Datasheet(HTML) 87 Page - Freescale Semiconductor, Inc |
|
87 / 133 page ![]() MC68CK338 MOTOROLA MC68CK338TS/D 87 CPTR — CPSM Test Register $YFF40A CPTR is used during factory testing of the CTM6. Accesses to CPTR must be made while the MCU is in test mode. 6.6 Clock Sources for Counter Submodules One of seven clock sources can be chosen for each counter submodule. Five of them are fixed prescaler taps derived from the system clock: ÷2, ÷4, ÷8, ÷16, and ÷32. A sixth prescaler tap is software selectable as the system clock divided by 64, 128, 256, or 512. An alternate prescaler option provides fixed prescaler taps of the system clock divided by 3, 6, 12, 24, and 48. In this case, the software se- lectable tap is the system clock divided by 96, 192, 384, or 768. The seventh selectable clock source is an external pin which may trigger on the rising or falling edge of the input signal. The external input allows a clock frequency to be selected that is not based on the MCU system clock. Alternately, the external clock input allows a counter submodule to be used for pulse or event counting. NOTE The external clock inputs for MCSM30 and MCSM31 are tied to the I/O pin CTD5 for DASM5. The external clock inputs for MCSM2 and FCSM3 are tied to the I/O pin CTD27 for DASM27. 6.7 Free-Running Counter Submodule (FCSM) The free-running counter submodule (FCSM) has a 16-bit up counter with an associated clock source selector, selectable time-base bus drivers, software writable control registers, software readable status bits, and interrupt logic. When the 16-bit up counter overflows from $FFFF to $0000, an optional over- flow interrupt may be generated. Software selects which, if any, time-base bus is to be driven by the 16-bit counter. A software control register selects whether the clock input to the counter is one of the taps from the prescaler or an input pin. The polarity of the external input pin is also programmable. One FCSM is contained in the CTM6. Figure 20 shows a block diagram of the FCSM. Table 49 Prescaler Division Ratio Select Field Prescaler Control Register Bits Prescaler Division Ratio PRUN DIV23 PSEL1 PSEL0 PCLK1 PCLK2 PCLK3 PCLK4 PCLK5 PCLK6 0 X X X 000000 1000248 16 32 64 1001248 16 32 128 1010248 16 32 256 1011248 16 32 512 110036 12 24 48 96 110136 12 24 48 192 111036 12 24 48 384 111136 12 24 48 768 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |