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MFS2401AVBA0ES Datasheet(PDF) 44 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 44 Page - NXP Semiconductors |
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44 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver This feature is only available in Normal mode and is activated by writing HIDWx_ENABLE = 1 in the M_HW_ID SPI register. ECU identification is done by controlling the HID pullup and pulldown current sources (HIDWxPU/PD_EN or HIDWxPU/PD_DIS) and reading the associated WAKEx pin status using the WKx_S bits of the M_STATUS SPI register. The pin threshold (HIDWx_TH_SEL), and pullup/pulldown current values (HIDWx_10MA_EN) are programmable via the M_HW_ID SPI register to allow integration into different systems. aaa-046846 Control lPD_HID 100 nF 220 Ω lPU_HID GND GND SPI WK pin status VSUP WAKEx/HIDx WAKEx/HIDx ECU connector (To VBAT or GND) Figure 28. Example of application for hardware ID function (either using solution 1 OR 2) In addition, the input buffer on the LIMP0 may be used as an additional HW ID pin if needed. In this case, an external bias current may be applied using a resistor as shown in Figure 29. To do so, the FS2400 must be programmed with LIMP0_EN_OTP = 0 and the MCU must configure LIMP0_GPO = 1 during INIT phase. The pin state is controlled using LIMP0_REQ and LIMP0_REL control bits. Its state can be read using LIMP0_SNS bit from FS_SAFETY_OUTPUTS SPI register. aaa-046847 C1 100 nF GND C2 100 nF GND C3 100 nF GND LIMP0 V3 Output 220 Ω Resistor sized for 1.5 mA 220 Ω Connector 220 Ω FS2400 HID1 HID0 Figure 29. Using LIMP0 as a third HW ID pin FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 44 / 151 |
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